74AHC244PW-Q100 NXP Semiconductors, 74AHC244PW-Q100 Datasheet - Page 3

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74AHC244PW-Q100

Manufacturer Part Number
74AHC244PW-Q100
Description
Buffers & Line Drivers Octal Buff/Drvr 3ST 5.5 V CMOS
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74AHC244PW-Q100

Polarity
Non-Inverting
Supply Voltage - Max
5.5 V
Supply Voltage - Min
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-20
Logic Type
CMOS
Maximum Power Dissipation
500 mW
Minimum Operating Temperature
- 40 C
Output Type
3-State
Propagation Delay Time
15 ns
Supply Current
80 uA
Part # Aliases
74AHC244PW-Q100,11
NXP Semiconductors
5. Pinning information
74AHC_AHCT244_Q100
Product data sheet
Fig 2.
Fig 4.
1OE
1A0
1A1
1A2
1A3
2
4
6
8
1
Logic symbol
Pin configuration SO20, TSSOP20
GND
1OE
1A0
2Y0
1A1
2Y1
1A2
2Y2
1A3
2Y3
10
1
2
3
4
5
6
7
8
9
5.1 Pinning
74AHCT244-Q100
18
16
14
12
74AHC244-Q100
1Y0
1Y1
1Y2
1Y3
2OE
2A0
2A1
2A2
2A3
aaa-003140
17
15
13
11
19
74AHC244-Q100; 74AHCT244-Q100
All information provided in this document is subject to legal disclaimers.
20
19
18
17
16
15
14
13
12
11
V
2OE
1Y0
2A0
1Y1
2A1
1Y2
2A2
1Y3
2A3
CC
3
5
7
9
mna874
Rev. 1 — 9 July 2012
2Y0
2Y1
2Y2
2Y3
Fig 3.
Fig 5.
(1) This is not a supply pin. The substrate is attached to this
IEC logic symbol
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Pin configuration DHVQFN20
index area
terminal 1
1A0
2Y0
1A1
2Y1
1A2
2Y2
1A3
2Y3
19
11
13
15
17
1
2
4
6
8
74AHCT244-Q100
Transparent top view
2
3
4
5
6
7
8
9
74AHC244-Q100
EN
EN
Octal buffer/line driver; 3-state
GND
mna873
(1)
19
18
17
16
15
14
13
12
18
16
14
12
aaa-003141
9
7
5
3
© NXP B.V. 2012. All rights reserved.
2OE
1Y0
2A0
1Y1
2A1
1Y2
2A2
1Y3
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