C8051F540-IMR Silicon Labs, C8051F540-IMR Datasheet - Page 99

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C8051F540-IMR

Manufacturer Part Number
C8051F540-IMR
Description
8-bit Microcontrollers - MCU 50 MIPS 16 kB 1 kB LIN 2.1 SPI
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F540-IMR

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
SFR Definition 12.4. SFRLAST: SFR Last
SFR Address = 0xA7; SFR Page = All Pages
Bit
7:0
Name
Reset
Type
Bit
SFRLAST[7:0]
Name
7
0
SFR Page Stack Bits.
This is the value that will go to the SFRNEXT register upon a return from inter-
rupt.
Write: Sets the SFR Page in the last entry of the SFR Stack. This will cause the
SFRNEXT SFR to have this SFR page value upon a return from interrupt.
Read: Returns the value of the SFR page contained in the last entry of the SFR
stack.
SFR page context is retained upon interrupts/return from interrupts in a 3 byte
SFR Page Stack: SFRPAGE is the first entry, SFRNEXT is the second, and
SFRLAST is the third entry. The SFR stack bytes may be used alter the context
in the SFR Page Stack, and will not cause the stack to “push” or “pop”. Only
interrupts and return from interrupts cause pushes and pops of the SFR Page
Stack.
6
0
5
0
Rev. 1.1
4
SFRLAST[7:0]
0
R/W
Function
3
0
2
0
C8051F54x
1
0
0
0
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