MAX3892EGH+T Maxim Integrated, MAX3892EGH+T Datasheet

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MAX3892EGH+T

Manufacturer Part Number
MAX3892EGH+T
Description
Serializers & Deserializers - Serdes
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX3892EGH+T

Operating Supply Voltage
3 V to 3.6 V
Package / Case
QFN-44 EP
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
FEATURES
DESCRIPTION
The DS2291 T1 Long Loop Stik contains all the circuitry
necessary to recover clock and data from a T1 line. The
DS2291 contains an Automatic Line Build Out (ALBO)
circuit that allows it to adapt to T1 lines varying in length
from 0 to 6,000 feet. It also will dejitter the recovered
clock and data according to the jitter attenuation curves
outlined in AT&T Communications Document TR 62411
(Accunet* T1.5 Service Description and Interface speci-
fication - December 1990). Applications area include
Channel Service Units (CSU), T1 monitoring equip-
ment, and T1 test equipment.
* Service mark of AT&T Communications
Recovers clock and data off of T1 lines from 0 to 6,000
feet in length
+0 to -30dBSX receiver sensitivity
Built-in Automatic Line Build Out (ALBO) circuitry; no
tuning or external components required
Dejitters the recovered clock and data
Meets TR 62411 (Dec. 1990) for jitter tolerance and
attenuation
Companion to the DS2290 T1 Isolation Stik
Connects to a standard 30-pin single in-line
connector
Single +5V supply
Compatible with the DS2180A or DS2141A T1 Trans-
ceivers
PIN ASSIGNMENT
OVERVIEW
The DS2291 contains onboard ALBO circuitry that al-
lows it to recover clock and data from T1 lines up to
6,000 feet in length. (See Figure 1.) Unlike alternative
methods of clock and data recovery from T1 lines, the
DS2291 does not require any tuning, nor does it need
any additional external circuitry. The state of the LOCK
pin indicates whether the DS2291 has been able to
phase and frequency lock to the incoming T1 signal. If
the LOCK pin is high, the DS2291 is properly locked
onto the incoming signal. The DS2291 meets the latest
T1 specification for jitter tolerance. The jitter tolerance
curve in Figure 2 is applicable over the full dynamic in-
put range of the DS2291.
LOCK 16
RNEG 5
RPOS 4
B8ZS 20
RCLK 3
LPOS 7
LNEG 8
LCLK 6
GND 22
GND 23
RCL 14
BPV 15
RX+ 29
RX– 30
VDD 1
VDD 2
DJA 19
RST21
NC 10
NC 11
NC 12
NC 13
NC 18
NC 24
NC 25
NC 26
NC 27
NC 28
BL 17
LB 9
T1 Long Loop Stik
(ACTUAL SIZE)
DS2291
022798 1/10
DS2291

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MAX3892EGH+T Summary of contents

Page 1

FEATURES Recovers clock and data off of T1 lines from 0 to 6,000 feet in length +0 to -30dBSX receiver sensitivity Built-in Automatic Line Build Out (ALBO) circuitry; no tuning or external components required Dejitters the recovered clock and data ...

Page 2

DS2291 Once the Long Loop Stik has recovered data from the T1 line, it can decode B8ZS code words and check for bipolar violations and carrier loss. If the B8ZS pin is tied high, the DS2291 will automatically replace incoming ...

Page 3

PIN DESCRIPTION Table 1 PIN SYMBOL I/O 1 Positive Supply. 5.0 volts RCLK O Receive Clock. Recovered 1.544 MHz clock. 4 RPOS O Receive Bipolar Data. Recovered bipolar data; updated on the rising edge of RCLK. ...

Page 4

DS2291 DS2291 BLOCK DIAGRAM Figure 1 PD 022798 4/ ...

Page 5

DS2291 JITTER TOLERANCE Figure 2 1K NOMINAL DS2291 PERFORMANCE 100 TR 62411 10 1 0.1 10 100 DS2291 JITTER ATTENUATION PERFORMANCE Figure –20 TR 62411 CURVE B –40 – 10K 100K FREQUENCY (Hz) ...

Page 6

DS2291 DS2291 APPLICATION (UNISOLATED INTERFACE) Figure 4 RECEIVE 25 OHMS T1 PAIR 2:1 TRANSMIT 0. PAIR nonpolarized 1:1.4 TTIP TRING TPOS TNEG TCLK LCLK LPOS LNEG 3 LEN0/1/2 TAIS LB DS2291 APPLICATION (ISOLATED INTERFACE) Figure 5 LCLK LPOS ...

Page 7

ABSOLUTE MAXIMUM RATINGS* Voltage on Any Pin Relative to Ground Operating Temperature Storage Temperature * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections ...

Page 8

DS2291 DIGITAL ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL LPOS, LNEG Setup to LCLK Fal ling LPOS, LNEG Hold from LCLK t HD Falling Propagation Delay from RCLK RPOS, RNEG Valid RCLK Period t P RCLK Pulse Width ...

Page 9

DS2291 T1 LONG LOOP Stik SIDE B SIDE PKG 30-PIN DIM MIN MAX A IN. 3.455 3.505 B IN. 3.229 3.239 C IN. 0.845 0.855 D IN. 0.395 0.405 E IN. 0.245 0.255 0.100 ...

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