MC100LVEL90DWG ON Semiconductor, MC100LVEL90DWG Datasheet - Page 2

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MC100LVEL90DWG

Manufacturer Part Number
MC100LVEL90DWG
Description
IC XLATOR TRPL ECL-LVPECL 20SOIC
Manufacturer
ON Semiconductor
Series
100LVELr
Datasheet

Specifications of MC100LVEL90DWG

Logic Function
Translator
Number Of Bits
3
Input Type
ECL
Output Type
LVPECL
Number Of Channels
3
Number Of Outputs/channel
1
Differential - Input:output
No/No
Propagation Delay (max)
0.67ns
Voltage - Supply
3 V ~ 3.8 V
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Supply Voltage
3 V ~ 3.8 V
Logic Type
Translator
Logic Family
ECL
Translation
ECL to LVPECL
High Level Output Current
- 50 mA
Low Level Output Current
50 mA
Propagation Delay Time
0.67 ns @ - 3 V to - 5.5 V @ 3 V to 3.8 V
Supply Voltage (max)
- 5.5 V/3.8 V
Supply Voltage (min)
+/- 3 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Rate
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
MC100LVEL90DWGOS

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC100LVEL90DWG
Manufacturer:
ON Semiconductor
Quantity:
4
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 2. MAXIMUM RATINGS
V
V
V
I
I
T
T
q
q
T
out
BB
A
stg
JA
JC
sol
Figure 1. Logic Diagram and Pinout: 20-Lead SOIC (Top View)
CC
EE
I
Symbol
LVPECL
V
V
20
1
CC
CC
Warning: All V
connected to Power Supply to guarantee proper operation.
ECL
Q0
D0
19
2
PECL Power Supply
NECL Power Supply
NECL Mode Input Voltage
Output Current
ECL V
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Wave Solder
* All V
Q0
D0
18
3
BB
CC
CC
Sink/Source
LVPECL
, V
GND
pins are tied together on the die.
17
4
ECL
EE
, and GND pins must be externally
Parameter
Q1
D1
16
5
Q1
D1
15
6
GND
LVPECL
14
7
ECL
Q2
D2
13
8
http://onsemi.com
Q2
D2
12
9
GND = 0 V
GND = 0 V
GND = 0 V
Continuous
Surge
0 lfpm
500 lfpm
Standard Board
V
V
Condition 1
10
11
EE
CC
2
Table 1. PIN DESCRIPTION
PIN
Dn, Dn
Qn, Qn
ECL V
V
V
GND
V
20 SOIC
20 SOIC
20 SOIC
CC
EE
Condition 2
I
w V
BB
EE
FUNCTION
ECL Inputs
LVPECL Outputs
ECL Reference Voltage Output
Positive Supply
Negative Supply
Ground
−65 to +150
−40 to +85
30 to 35
Rating
−8 to 0
−6 to 0
8 to 0
± 0.5
100
265
50
90
60
°C/W
°C/W
°C/W
Unit
mA
mA
mA
°C
°C
°C
V
V
V

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