MAX6618AUB+ Maxim Integrated Products, MAX6618AUB+ Datasheet - Page 7
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MAX6618AUB+
Manufacturer Part Number
MAX6618AUB+
Description
IC PECI TO I2C TRANSLATOR 10UMAX
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX6618AUBT.pdf
(17 pages)
Specifications of MAX6618AUB+
Logic Function
Translator
Number Of Bits
1
Input Type
PECL
Output Type
I²C™
Number Of Channels
1
Number Of Outputs/channel
1
Differential - Input:output
No/No
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-20°C ~ 120°C
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Supply Voltage
3 V ~ 3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Rate
-
Table 2. CONFIG0 Register
The CONFIG0 register holds a bit mask for PECI sock-
ets and domains that are enabled for polling as well as
a polling delay (minimum delay between sets of polls)
and features enable/disable bits. Table 2 shows the
various options for CONFIG0.
BIT(S)
15:8
2:0
15
14
13
12
11
10
9
8
7
6
5
4
3
Polling enable for sockets and domains
1 = enable socket 3, domain 1
1 = enable socket 3, domain 0
1 = enable socket 2, domain 1
1 = enable socket 2, domain 0
1 = enable socket 1, domain 1
1 = enable socket 1, domain 0
1 = enable socket 0, domain 1
1 = enable socket 0, domain 0
1 = enable I
0 = Disable timeout
1 = alternate data representation
0 = 16-bit data representation
1 = enable I
(PEC) on device return data
0 = Disable PEC
1 = mask temperature alerts
0 = Activate alerts
Reserved, set to 0
Poll delay, see Table 3
_______________________________________________________________________________________
2
2
DESCRIPTION
C bus lockup timeout
C packet error checksum
CONFIG0
DEFAULT
00h
0
0
0
0
0
0
0
0
1
0
1
0
0
5
Table 3. Polling Delay
Table 4. CONFIG1 Register
The optional polling delay (bits 2:0) inserts after polling
the set of all sockets and domains that are enabled in
bits 15:8 with a minimal pause of 2.5ms between PECI
reads. After polling all enabled sockets and domains,
the device pauses PECI communications for the config-
ured time before starting to poll the set of enabled
sockets and domains again. Table 3 shows the various
polling delay options.
The CONFIG1 register configures the maximum num-
ber of retries before aborting a PECI temperature read
as well as the originated (suggested) PECI bit time.
Table 4 shows the various options for CONFIG1.
PECI-to-I
POLL DELAY VALUE
BIT(S)
15:8
7:0
Originated PECI bit time
(before negotiation)
01h: RESERVED
02h…0FFh: CONFIG1[15:8] + 1μs
Minimum: 02h (= 3μs / 333.3kHz)
Maximum: 0FFh (= 256μs / 3.906kHz)
Maximum number of retries for PECI
transactions
0
1
2
3
4
5
6
7
DESCRIPTION
2
DELAY BETWEEN POLLS (ms)
C Translator
Polling on request only
100 (default)
Reserved
500
2.5
10
50
5
CONFIG1
DEFAULT
02h
03h
7