MAX522ESA-T Maxim Integrated, MAX522ESA-T Datasheet - Page 8

• Manufacturer Part Number: MAX522ESA-T
• Description: Digital to Analog Converters - DAC
• Manufacturer: Maxim Integrated

Specifications of MAX522ESA-T

• Number Of Converters: 2
• Number Of Dac Outputs: 2
• Resolution: 8 bit
• Interface Type: QSPI, SPI, Serial (3-Wire, Microwire)
• Settling Time: 70 us
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-8
• Minimum Operating Temperature: - 40 C
• Output Type: Voltage
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 2.7 V
• Voltage Reference: External

An active-low chip select (
to receive data from the serial data input. Data is
clocked into the shift register on every rising edge of
the serial clock signal (SCLK). The clock frequency can
be as high as 5MHz.
Data is sent MSB first and can be transmitted in one 16-
bit word. The write cycle can be segmented when
kept active (low) to allow, for example, two 8-bit-wide
transfers. After clocking all 16 bits into the input shift
register, the rising edge of
and the shutdown status. Because of their single
buffered structure, DACs cannot be simultaneously
updated to different digital values.
Dual, 8-Bit, Voltage-Output
Serial DAC in 8-Pin SO Package
Figure 1. DAC Simplified Circuit Diagram
8
GND
SHOWN FOR ALL 1s ON DAC
REF
_______________________________________________________________________________________
2R
2R
R
2R
R
C
–
C
—
–
—
S
–
S
–
) enables the shift register
updates the DAC outputs
2R
R
Serial Interface
2R
OUT
C
–
—
S
–
is
Table 2 lists the serial-input data format. The 16-bit
input word consists of an 8-bit control byte and an 8-bit
data byte. The 8-bit control byte is not decoded inter-
nally. Every control bit performs one function. Data is
clocked in starting with UB1 (Uncommitted Bit), fol-
lowed by the remaining control bits and the data byte.
The LSB of the data byte (B0) is the last bit clocked into
the shift register (Figure 2).
Table 3 is an example of a 16-bit input word. It per-
forms the following functions:
Table 1. Input Shift Register
**Clocked in last.
**Clocked in first.
• 80hex (128 decimal) loaded into DAC registers
• DAC A and DAC B are active.
A and B.
Serial-Input Data Format and Control Codes
UB1**
UB4
UB3
UB2
B0*
SA
SB
B1
B2
B3
B4
B5
B6
B7
LA
LB
DAC Data Bit 0 (LSB)
DAC Data Bit 1
DAC Data Bit 2
DAC Data Bit 3
DAC Data Bit 4
DAC Data Bit 5
DAC Data Bit 6
DAC Data Bit 7 (MSB)
Load Reg DAC A, Active High
Load Reg DAC B, Active High
Uncommitted Bit 4
Shut Down DAC A, Active High
Shut Down DAC B, Active High
Uncommitted Bit 3
Uncommitted Bit 2
Uncommitted Bit 1