LTC1555IGN Linear Technology, LTC1555IGN Datasheet - Page 9

• Manufacturer Part Number: LTC1555IGN
• Description: IC LEVEL TRANSLATOR 16-SSOP
• Manufacturer: Linear Technology

Specifications of LTC1555IGN

• Logic Function: Level Shifter
• Number Of Bits: 1
• Input Type: Voltage
• Output Type: Voltage
• Number Of Channels: 1
• Number Of Outputs/channel: 1
• Differential - Input:output: No/No
• Propagation Delay (max): 18ns
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-SSOP
• Supply Voltage: 1.8 V ~ 5.5 V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Rate: -

APPLICATIONS
I/O pin on the SIM side. The second method is to use the
DDRV pin to send data to the SIM and use the DATA pin to
receive data from the SIM. When the DDRV pin is not used,
it should either be left floating or tied to DV
Level Translation with DV
It is assumed that most applications for these parts will
use controller supply voltages (DV
to V
than 0.6V or so, the parts’ operation will be affected in the
following ways: 1) A small DC current (up to 100 A) will
flow from DV
N-channel pass device and the I/O pull-up resistor
(except when the part is in shutdown at which time DV
is disconnected from V
If the V
V
load current pulls V
SIM is sending data back to the controller, a logic high on
the I/O pin will result in the DATA pin being pulled up to
[V
example, if DV
only swing from 0.1V to 3.67V when receiving data
from the SIM side.
Optional LDO Output
The LTC1556 also contains an internal LDO regulator for
providing a low noise boosted supply voltage for low power
external circuitry (e.g., frequency synthesizers, etc.) Tying
the FB pin to the LDO pin provides a regulated 4.3V at the
LDO output (see Figure 4). A 3.3 F (minimum) capacitor is
CC
CC
CC
output may be pulled out of regulation until sufficient
+ 1/3(DV
. In cases where DV
CC
load current is less than the DV
CC
CC
CC
to V
– V
is 5V and V
U
CC
CC
CC
through the DATA pull-up resistor,
back into regulation. 2) When the
)], not all the way up to DV
CC
INFORMATION
U
by turning off the pass device).
CC
CC
is greater than V
CC
> V
is 3V, the DATA pin will
CC
CC
W
) less than or equal
CC
CC
current, the
CC
.
U
by more
CC
. For
CC
10kV ESD Protection
All pins that connect to the SIM (CLK, RST, I/O, V
withstand over 10kV of human body model (100pF/1.5k )
ESD. In order to ensure proper ESD protection, careful
board layout is required. The GND pins should be tied
directly to a GND plane. The V
located very close to the V
the GND plane.
required to ensure output stability. A 10 F low ESR capaci-
tor is recommended, however, to minimize LDO output
noise. The LDO output may also be used as an auxiliary
switch to V
the LDO pin will be internally connected to the V
through the P-channel pass device. The LDO may be dis-
abled at any time by switching the EN pin from DV
The 4.3V LDO output is usable only when V
greater). It is not available when V
OFF ON
Figure 4. Auxiliary LDO Connections (LTC1556 Only)
CC
. If the FB pin is left floating or is tied to GND,
EN
FB 153k
61k
V
REF
1 A
LTC1555/LTC1556
–
+
CC
pin and tied immediately to
CC
CC
V
capacitor should be
= 3V.
CC
= 5V
LDO
CC
1555/56 F04
+
CC
4.3V
CC
CC
is 5V (or
to GND.
, GND)
output
10 F
TANT
I
0mA to
10mA
LDO
9