ISL24010IVZ-T Intersil, ISL24010IVZ-T Datasheet - Page 7

IC VOLT SHIFTER TFT/LCD 20-TSSOP

ISL24010IVZ-T

Manufacturer Part Number
ISL24010IVZ-T
Description
IC VOLT SHIFTER TFT/LCD 20-TSSOP
Manufacturer
Intersil
Datasheet

Specifications of ISL24010IVZ-T

Logic Function
Level Shifter
Number Of Bits
8
Input Type
Voltage
Output Type
Voltage
Number Of Channels
1
Number Of Outputs/channel
8
Differential - Input:output
No/No
Propagation Delay (max)
150ns
Operating Temperature
-40°C ~ 85°C
Package / Case
20-TSSOP
Supply Voltage
-5 V ~ 22 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Data Rate
-
Other names
ISL24010IVZ-TTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL24010IVZ-T
Manufacturer:
INTERSIL
Quantity:
20 000
Typical Performance Curves
Application Information
General
The ISL24010 is an Octal voltage level shifter. The part was
designed to level shifts a digital input signal to +22V and -5V
for TFT-LCD displays. The device is capable of level shifting
a CMOS logic signal between +40V and -20V.
Power Supply Decoupling
The ISL24010 requires a 0.1µF decoupling capacitor as
close to the V
large load equal to 5kΩ in parallel with 100pF (Figure 16).
This will deduce any dv/dt between the different supplies and
prevent the internal ESD clamp from turning on and
damaging the part.
Power Supply Sequence
The ISL24010 requires that V
V
supplies, then V
The reason for this requirement is shown in Circuit 4 in the
Pin Description Table. The ESD protection diode between
V
drop greater than V
sequence: V
The ESD protection scheme is based on diodes from the
pins to the V
dV/dt triggered clamp imposes a maximum supply turn-on
slew rate of 10V/µs. This clamp will trigger if the supply
powers up too fast, causing amps of current to flow. Ground
and V
scheme. In applications where the dV/dt supply ramp could
exceed 10V/µs, such as hot plugging, additional methods
should be employed to ensure the rate of rise is not
exceeded.
Latch-up Proof
The ISL24010 is manufactured in a high voltage DI process
that isolates every transistor in it’s own tub making the part
latch-up proof.
ON1
ON2
ON1
at all times. Therefore, if V
and Von 1 will forward bias if V
are treated as I/O pins with this protection
ON2
ON2
ON1
ON2
, V
supply and a dV/dt- triggered clamp. This
, V
ON2
ON1
ON2
needs to be turned on before V
. Recommended power supply
, V
and V
OFF
ON2
7
then input logic signals.
OFF
ON1
be greater than or equal to
FIGURE 13. TRANSIENT RESPONSE vs LOAD CAPACITANCE
power supply pins for a
ON1
and Von 2 are different
0
0
T
becomes a diode
A
100pF
= 25°C, Output load parallel RC (RL = 5kΩ, CL = 100pF) unless otherwise specified. (Continued)
ON1
V
V
50kHz 50% Duty Cycle
ON1
OFF
Pulse Input
1500pF
.
&
= -5V
ISL24010
2
= 22V
2µs/DIV
Input Pin Connections
Unused inputs must be tied to ground. Failure to tie unused
input pins to ground will result in a rail to rail oscillations on
the respective output pins and higher unwanted power
dissipation in the part. Under these conditions, the
temperature of the part could get very hot.
Limiting the Output Current
No output short circuit current limit exists on this part. All
applications need to limit the output current to less than
80mA. Adequate thermal heat sinking of the parts is also
required.
Application Diagram (TV)
TROLLER
TIMING
CON-
FIGURE 14. TYPICAL TV APPLICATION CIRCUIT
1.0µF
1.0µF
V
CONVERTER
ON1
ISL24010
SHIFTER
LEVEL
DC/DC
V
ON2
V
OFF
1.0µF
LCD PANEL

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