MC100LVELT22DG ON Semiconductor, MC100LVELT22DG Datasheet - Page 2

• Manufacturer Part Number: MC100LVELT22DG
• Description: IC TRANSLATOR DUAL 3.3V 8SOIC
• Manufacturer: ON Semiconductor
• Series: 100LVELTr

Specifications of MC100LVELT22DG

• Logic Function: Translator
• Number Of Bits: 2
• Input Type: LVCMOS, LVTTL
• Output Type: LVPECL
• Number Of Channels: 2
• Number Of Outputs/channel: 1
• Differential - Input:output: No/Yes
• Propagation Delay (max): 0.6ns
• Voltage - Supply: 3 V ~ 3.8 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Supply Voltage: 3 V ~ 3.8 V
• Logic Type: Translator
• Logic Family: ECL
• Translation: LVCMOS/LVTTL to LVPECL
• Propagation Delay Time: 0.6 ns
• Supply Voltage (max): 3.8 V
• Supply Voltage (min): 3 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Rate: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: MC100LVELT22DGOS

EP
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
2. JEDEC standard multilayer board − 2S2P (2 signal, 2 power)
Table 3. MAXIMUM RATINGS
V
V
I
T
T
q
q
q
q
q
T
q
Symbol
out
A
stg
JA
JC
JA
JC
JA
sol
JC
CC
I
Figure 1. 8−Lead Pinout (Top View) and Logic Diagram
Q1
Q0
Q1
Q0
Positive Power Supply
Input Voltage
Output Current
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Wave Solder
Thermal Resistance (Junction−to−Case)
1
2
3
4
1. For additional information, see Application Note AND8003/D.
LVPECL
Table 2. ATTRIBUTES
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Parameter
LVCMOS
LVTTL/
Characteristics
Pb−Free
8
7
6
5
Pb
V
D0
D1
GND
CC
http://onsemi.com
GND = 0 V
GND = 0 V
Continuous
Surge
0 lfpm
500 lfpm
std bd
0 lfpm
500 lfpm
std bd
0 lfpm
500 lfpm
<2 to 3 sec @ 248°C
<2 to 3 sec @ 260°C
(Note 2)
Oxygen Index: 28 to 34
Condition 1
Human Body Model
2
Machine Model
Table 1. PIN DESCRIPTION
Qn, Qn
D0, D1
V
GND
V
SO−8
SO−8
SO−8
TSSOP−8
TSSOP−8
TSSOP−8
DFN8
DFN8
DFN8
EP
CC
PIN
I
 V
Condition 2
CC
UL 94 V−0 @ 0.125 in
FUNCTION
LVPECL Differential Outputs
LVTTL/LVCMOS Inputs
Positive Supply
Ground
(DFN8 only) Thermal exposed
pad must be connected to a suf-
ficient thermal conduit. Electric-
ally connect to the most negative
supply (GND) or leave uncon-
nected, floating open.
> 200 V
Level 1
> 4 kV
Value
N/A
N/A
164
41 to 44 ± 5%
41 to 44 ± 5%
−65 to +150
−40 to +85
35 to 40
Rating
100
190
130
185
140
129
265
265
50
84
7
7
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Unit
mA
mA
°C
°C
°C
V
V