ADG3123BRUZ Analog Devices Inc, ADG3123BRUZ Datasheet - Page 11

IC XLATOR 8CH LOG-HV 20-TSSOP

ADG3123BRUZ

Manufacturer Part Number
ADG3123BRUZ
Description
IC XLATOR 8CH LOG-HV 20-TSSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADG3123BRUZ

Logic Function
Translator
Number Of Bits
8
Input Type
CMOS
Output Type
Voltage
Number Of Channels
8
Number Of Outputs/channel
1
Differential - Input:output
No/No
Propagation Delay (max)
125ns
Voltage - Supply
2.3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
20-TSSOP
Supply Voltage
2.3 V ~ 5.5 V
No. Of Inputs
8
Propagation Delay
76ns
Logic Type
Level Translator
Supply Voltage Range
2.3V To 5.5V
Logic Case Style
TSSOP
No. Of Pins
20
Operating Temperature Range
-40°C To +85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Rate
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADG3123BRUZ
Manufacturer:
Analog Devices Inc
Quantity:
1 970
Part Number:
ADG3123BRUZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
APPLICATIONS
The high voltage operation coupled with high current driving
capability and the wide range of CMOS levels accepted by the
ADG3123, make the device ideal for LCD-TFT panel applica-
tions. In this type of application, the controllers that generate
the timing signals required to control the pixel scanning process
inside the panel are usually low voltage CMOS devices.
V
DD
= +2.3V TO +5.5V
CONTROLLER
TIMING
CONVERTER
DC TO DC
V
DD
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
Figure 18. Typical Application Circuit
GND
–5V TO –10V
+25V TO +30V
+25V TO +30V
Rev. A | Page 11 of 12
10
1
2
3
4
5
6
7
8
9
0.1µF
10µF
NOTE: |V
GND
A1
A2
A3
A4
A5
A6
A7
A8
V
SS
ADG3123
+
Most LCD-TFT panels operate at high supply voltages; therefore,
the timing signals generated by the controller require level
translation to drive the panel. Figure 18 shows a typical applica-
tion circuit where the ADG3123 translates eight timing signals
provided by the timing controller into high voltage logic levels
required to drive the panel.
DDB
V
V
| + |V
DDB
DDA
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
0.1µF
10µF
0.1µF
10µF
SS
20
19
18
17
16
15
14
13
12
11
+
| ≤ 35V and V
+
LCD-TFT
PANEL
DDA
≤ V
DDB
ADG3123

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