PCA9306DP1,125 NXP Semiconductors, PCA9306DP1,125 Datasheet - Page 2

• Manufacturer Part Number: PCA9306DP1,125
• Description: IC LEVEL TRANSLATOR 8-TSSOP
• Manufacturer: NXP Semiconductors

Specifications of PCA9306DP1,125

• Package / Case: 8-TSSOP
• Logic Function: Translator, Bidirectional, Open Drain
• Number Of Bits: 2
• Input Type: Voltage
• Output Type: Voltage
• Number Of Channels: 2
• Number Of Outputs/channel: 1
• Differential - Input:output: No/No
• Voltage - Supply: 1 V ~ 3.6 V, 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Supply Voltage: 1.2 V ~ 5.5 V
• Supply Voltage (max): 5 V
• Supply Voltage (min): 0 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Rate: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4243-2; 935283122125; PCA9306DP1-G

NXP Semiconductors
2. Features and benefits
PCA9306
Product data sheet
All channels have the same electrical characteristics and there is minimal deviation from
one output to another in voltage or propagation delay. This is a benefit over discrete
transistor voltage translation solutions, since the fabrication of the switch is symmetrical.
The translator provides excellent ESD protection to lower voltage devices, and at the
same time protects less ESD-resistant devices.
2-bit bidirectional translator for SDA and SCL lines in mixed-mode I
Standard-mode, Fast-mode, and Fast-mode Plus I
Less than 1.5 ns maximum propagation delay to accommodate Standard-mode and
Fast-mode I
Allows voltage level translation between:
Provides bidirectional voltage translation with no direction pin
Low 3.5 Ω ON-state connection between input and output ports provides less signal
distortion
Open-drain I
5 V tolerant I
High-impedance SCL1, SDA1, SCL2 and SDA2 pins for EN = LOW
Lock-up free operation
Flow through pinout for ease of printed-circuit board trace routing
ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
Packages offered: SO8, TSSOP8, VSSOP8, XQFN8, XSON8, XSON8U
1.0 V V
1.2 V V
1.8 V V
2.5 V V
3.3 V V
ref(1)
ref(1)
ref(1)
ref(1)
ref(1)
2
All information provided in this document is subject to legal disclaimers.
2
2
C-bus devices and multiple masters
C-bus I/O ports (SCL1, SDA1, SCL2 and SDA2)
C-bus I/O ports to support mixed-mode signal operation
and 1.8 V, 2.5 V, 3.3 V or 5 V V
and 1.8 V, 2.5 V, 3.3 V or 5 V V
and 3.3 V or 5 V V
and 5 V V
and 5 V V
Rev. 6 — 25 November 2010
Dual bidirectional I
bias(ref)(2)
bias(ref)(2)
bias(ref)(2)
2
C-bus and SMBus voltage-level translator
bias(ref)(2)
bias(ref)(2)
2
C-bus and SMBus compatible
PCA9306
2
© NXP B.V. 2010. All rights reserved.
C-bus applications
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