8545AG-02LF IDT, 8545AG-02LF Datasheet - Page 10

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8545AG-02LF

Manufacturer Part Number
8545AG-02LF
Description
Clock Drivers & Distribution
Manufacturer
IDT
Datasheet

Specifications of 8545AG-02LF

Product Category
Clock Drivers & Distribution
Rohs
yes
Part # Aliases
ICS8545AG-02LF
ICS8545I-02 Data Sheet
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS8545I-02.
Equations and example calculations are also provided.
1.
The total power dissipation for the ICS8545I-02 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. The
maximum recommended junction temperature for HiPerClockS devices is 125°C.
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
a multi-layer board, the appropriate value is 91.1°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 6. Thermal Resistance
ICS8545AGI-02 REVISION A JULY 29, 2009
Meters per Second
Multi-Layer PCB, JEDEC Standard Test Boards
Power Dissipation.
Power (core)
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
85°C + 0.312W * 91.1°C/W = 113.4°C. This is well below the limit of 125°C.
JA
A
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
MAX
= V
DD_MAX
θ
JA
* I
for 20 Lead TSSOP, Forced Convection
DD_MAX
DD
= 3.3V + 5% = 3.465V, which gives worst case results.
JA
= 3.465V * 90mA = 311.85mW
* Pd_total + T
θ
JA
A
91.1°C/W
by Velocity
0
10
LOW SKEW, 1-TO-4 LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER
86.7°C/W
JA
1
must be used. Assuming no air flow and
©2009 Integrated Device Technology, Inc.
84.6°C/W
2.5

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