YSS943 YAMAHA [YAMAHA CORPORATION], YSS943 Datasheet

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YSS943

Manufacturer Part Number
YSS943
Description
ADAMB Advanced Digital Audio Multi channel decode processor
Manufacturer
YAMAHA [YAMAHA CORPORATION]
Datasheet
[Note]
The YSS944 (ADAMB-f)/YSS943 (ADAMB-b)/YSS940 (ADAMB-nd) is an audio decoding digital signal
processor that integrates onto a single chip the various digital signal processing functions required for AV
amplifiers, etc. It includes an advanced 32-bit floating-point DSP and is able to decode a variety of audio
formats.
• The contents described in this manual are implemented by downloading boot firmware.
• The YSS943 cannot execute DTS-ES and DTS Neo:6 decoding.
• The YSS940 cannot execute any decoding related to DTS (DTS, DTS-ES, DTS 96/24, and DTS Neo:6).
[Note]
Outline
Features
“Dolby,” ”Dolby Pro Logic IIx,” and “AC-3” are trademarks of Dolby Laboratories.
“DTS,” “DTS-ES,” “DTS 96/24,” and “DTS Neo:6” are trademarks of Digital Theater Systems, Inc.
Applications
For detailed information about the boot firmware, please contact YAMAHA.
YSS944/943/940
Supports various types of decoding up to 7.1 channels (5.1/6.1/7.1 channels selectable).
5.1-channel decoding of Dolby Digital (AC-3), DTS, AAC.
6.1-channel decoding of Dolby Digital EX, DTS-ES.
DTS 96/24 decoding and audio interface clock division/switching functions.
Dolby Pro Logic IIx and DTS Neo:6 decoding
Tone control and bass management functions
Function modification/expansion by downloading firmware to on-chip memory
Lip-sync function that enables synchronization of voice and video with variable voice delay
Supports sampling frequencies up to 192 kHz during PCM playback.
1/2 down sampling function when two PCM channels are played back
Dolby Digital/DTS/AAC decode information output function (can be read by microprocessor)
High-speed/high-accuracy operation by 32-bit floating-point DSP
No external memory needed (external memory is used when delay is increased.)
Eight general I/O ports
On-chip PLL for generation of high-speed internal operating clock
Supply voltage: 1.2 V (core block) and 3.3 V (pin block)
Low power consumption: about 210 mW (standard value during Dolby Digital decoding)
Si-gate CMOS process
Lead-free plating LQFP144 package (YSS944-VZ, YSS943-VZ, and YSS940-VZ)
AV amplifiers for home theaters
Car audio systems
Operating frequency: 180 MHz (178.176 MHz)
Data bus width:
Multiplier/adder: 32 bits × 32 bits + 55 bits → 55 bits (47-bit mantissa and 8-bit exponent)
Advanced Digital Audio Multi channel decode processor
32 bits (24-bit mantissa and 8-bit exponent)
ADAMB
CATALOG No.: LSI-4SS944A31
YSS944/943/940 CATALOG
2005.6

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YSS943 Summary of contents

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... Advanced Digital Audio Multi channel decode processor Outline The YSS944 (ADAMB-f)/YSS943 (ADAMB-b)/YSS940 (ADAMB-nd audio decoding digital signal processor that integrates onto a single chip the various digital signal processing functions required for AV amplifiers, etc. It includes an advanced 32-bit floating-point DSP and is able to decode a variety of audio formats ...

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... Input channel selection Volume adjustment Tone Control Bass Management User mute Auto mute Input delay Output delay Stream detection Noise generation Impulse generation General purpose I/O port 2 YSS944/943/940 YSS944 YSS943 YES YES YES YES YES YES YES YES YES YES YES YES YES NO ...

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YSS944/943/940 Block Diagram Block Name This is the internal operating clock generation block. ClkGen This block provides the PLL and supplies the clock to each block. This is an interface block to connect to a microprocessor. MicomIF This block controls ...

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Pin Configuration nMEMCE 109 MEMA10 110 nMEMOE 111 MEMA18 112 STATUS0 113 STATUS1 114 STATUS2 115 STATUS3 116 VSS 117 VSS 118 VDD2 119 VDD2 120 VDD1 121 MISO 122 VSS 123 MISI 124 MISCK 125 nMICS 126 VDD2 127 ...

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YSS944/943/940 Pin Functions Type Pin Pin Name No. Power supply 9 VDD1 100 121 136 5 VDD2 107 108 119 ...

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Type Pin Pin Name No 105 106 117 118 123 129 130 139 140 1 AHVSS 2 AHVSSG 3 DVSS 141 AVSSR Initial clear 131 nIC Clock ...

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YSS944/943/940 Type Pin Pin Name No. 30 SDIWCK 26 SDI3 27 SDI2 28 SDI1 29 SDI0 Audio interface 38 SDOMCK 34 SDOBCK 37 SDOWCK 44 SDO3 43 SDO2 40 SDO1 39 SDO0 External memory 112 MEMA18 interface 58 MEMA17 73 ...

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Type Pin Pin Name No. 135 nMUTE 133 ZEROFLG 13 STATUS7 12 STATUS6 11 STATUS5 10 STATUS4 116 STATUS3 115 STATUS2 114 STATUS1 113 STATUS0 General-purpose 57 IOPORT7 I/O ports 56 IOPORT6 General-purpose 55 IOPORT5 I/O ports 54 IOPORT4 53 ...

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... Supports DTS-ES Discrete 6.1 decoding. (Sampling frequencies of 44.1 kHz and 48 kHz.) - Supports DTS 96/24 decoding. (Output sampling frequencies of 88.2 kHz and 96 kHz.) [Note] - The YSS943 does not support DTS-ES Discrete 6.1 decoding. - The YSS940 does not support any DTS decoding. • AAC decoding - Firmware AAC decoder is included. ...

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... DTS decoding function). - Supported sampling frequencies are 32 kHz, 44.1 kHz, 48 kHz, 64 kHz, 88.2 kHz, and 96 kHz. [Note] - The YSS943 and YSS940 do not support DTS Neo:6 decoding. (3) Post Processor Functions The following post-processing function can be applied to the results of main decoder or post decoder. • Post-processing input channel selection - Firmware Switcher is included ...

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YSS944/943/940 • Audio interface - Master clock, bit clock, word clock, and four serial data (8ch) for input and output are provided respectively. - Various audio interface formats are supported. - The bit clock rate is fixed to 64 fs. ...

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Microprocessor Interface External microprocessor or similar devices use this microprocessor interface (4-wire serial interface) to perform the following tasks. • Access to registers • Firmware download to on-chip memory (1) Register access Registers are accessed in 16-bit units via the ...

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YSS944/943/940 (2) On-chip memory access (firmware download) Access to on-chip memory is performed in 32-bit units via the microprocessor interface. Also, on-chip memory access can be performed concurrently with register access. methods prepared for this LSI are explained below. (a) ...

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Interruption of burst transfer: • Burst transfer can be interrupted by setting nMICS to high level. • The write operation becomes invalid when the rising edge of MISCK occurs for the 32nd bit of data (D31 in the figure). ...

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YSS944/943/940 (3) Microprocessor interface connection example When microprocessor interface pins are shared by several LSIs, the target LSI can be selected by either of the following two methods. • Design nMICS pins dedicated to specific LSIs. • When nMICS pins ...

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Microprocessor interface connection example 2 (multiple LSIs) nMICS Chip 2 IOPORT3 to IOPORT0 = 2 IOPORT3 to IOPORT0 = 3 <1> n MICS Write ChipAdr MI SI CAE = 1 CA[3:0] = 0011 CAE 0 (Chip 2, 3) Internal ...

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YSS944/943/940 Audio Interface Input and output of digital audio data is performed via two interfaces: • SDI (serial data input) interface • SDO (serial data output) interface (1) SDI interface format The following serial data input format is supported via ...

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SDO interface format The following serial data output format is supported via register settings. Regardless of the register setting, the output signals for SDO3 to SDO0 are always handled as fixed-point 24-bit data. SDIWP = 0 SDOWCK SDOWP = ...

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YSS944/943/940 Interrupt Requests This LSI’s status changes by any of the following five factors are externally reported as interrupt requests via the nINT pin. <1> When mute status is set by the auto mute function <2> When mute status is ...

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Register List The YSS422/421 is controlled by accessing the following registers via the microcomputer interface (nMICS, MISCK, MISI, and MISO). Default Address Byte Name R/W D7 Value 0x00 ChipAdr R/W 0x00 CAE 0x01 IOsel R/W 0x00 0x02 IPort R Undefined ...

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YSS944/943/940 0x2F RBVolume R/W 0x00 0x30 R/W 0x00 MasterVolume 0x31 LScaleH R/W 0x00 0x32 LScaleL R/W 0x00 0x33 RScaleH R/W 0x00 0x34 RScaleL R/W 0x00 0x35 LSScaleH R/W 0x00 0x36 LSScaleL R/W 0x00 0x37 RSScaleH R/W 0x00 0x38 RSScaleL R/W ...

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Bitstream14 R/W 0x00 0x67 Bitstream15 R/W 0x00 0x68 Bitstream16 R/W 0x00 0x69 Bitstream17 R/W 0x00 0x6A Bitstream18 R/W 0x00 0x6B Bitstream19 R/W 0x00 0x6C Bitstream20 R/W 0x00 0x6D Test 0x6E Test 0x6F Test 0x70 Test 0x71 Test 0x72 Test ...

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YSS944/943/940 Electrical Characteristics (1) Absolute Maximum Ratings Item Power supply voltage 1 (3.3 V) Power supply voltage 2 (1.2 V) Input voltage1 Note 1) Input voltage2 Note 2) Storage temperature Condition: All GND pins (VSS, AVSSR, AHVSS, AHVSSG, and DVSS) ...

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DC Characteristics Parameter High level input voltage (1) Low level input voltage (1) High level input voltage (2) Low level input voltage (2) High level output voltage Low level output voltage High level output current Low level output current ...

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YSS944/943/940 (5) AC Characteristics (a) Power up, Hardware Reset, and clock No. Parameter Symbol 1 nIC time 1 2 nIC time clock frequency 4 XI clock duty Internal operating 5 clock cycle 6 Power ON time Note ...

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Microprocessor interface No. Parameter 1 MISCK cycle 2 MISCK rise time 3 MISCK fall time 4 MISCK high level time 5 MISCK low level time 6 nMICS and MISI setup time 7 nMICS and MISI hold time 8 MISO ...

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YSS944/943/940 (c) Audio interface 1) SDIMCK No. Parameter 1 SDIMCK input frequency 2 SDIMCK duty 3 SDIMCK rise time 4 SDIMCK fall time SDIMCK 2) SDOMCK No. Parameter 1 SDOMCK output frequency 2 SDOMCK duty 3 SDOMCK rise time 4 ...

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SDIBCK, SDIWCK, SDI3 to SDI0 (slave operation) No. Parameter 1 SDIBCK input frequency 2 SDIBCK duty 3 SDIBCK rise time 4 SDIBCK fall time 5 SDIWCK and SDI3-0 setup time 6 SDIWCK and SDI3-0 hold time Note 1) The ...

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YSS944/943/940 5) SDOBCK, SDOWCK, SDO3 to SDO0 (master operation) No. Parameter 1 SDOBCK output frequency 2 SDOBCK output duty factor 3 SDOBCK rise time 4 SDOBCK fall time SDOWCK, SDO3 to SDO0 5 Output delay time SDIBCK → SDOBCK 6 ...

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External memory interface When EM_CYC = c, EM_WEH = w, and EM_OEH = o, the timing is as described below. 1) Read No. Parameter 1 Read cycle time 2 Address access time 3 nMEMOE access time 4 Data setup ...

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YSS944/943/940 2) Write No. Parameter 1 Write cycle time 2 Data setup time 3 Data hold time 4 Address setup time 5 Address hold time 6 nMEMWE pulse width MEMA18-0 nMEMCE nMEMOE nMEMWE MEMD7-0 Symbol Condition Min ...

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Example of System Configuration The YSS944/943/940 is connected to CODEC (ADC/DAC) or DIR/DIT via the audio interface. The YSS944/943/940 is connected to a microprocessor for control via the microcomputer interface. External memory (SRAM option when using the input/output ...

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YSS944/943/940 Package Dimensions The storage and soldering of LSIs for surface mounting need special consideration. For detailed information, please contact your local Yamaha agent The shape of the molded corner may slightly differ from the shape in this diagram. The ...

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YSS944/943/940 ...

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