LA70100M_06 SANYO [Sanyo Semicon Device], LA70100M_06 Datasheet - Page 8

• Manufacturer Part Number: LA70100M_06
• Description: SECAM Chroma-Signal Processor IC for VCR
• Manufacturer: SANYO [Sanyo Semicon Device]

(3) CLK INPUT, AFC
used for automatically adjusting the BELL filter and generating timing pulse for AFC and for sync gate. AFC circuit
automatically adjusts the frequency characteristics for each BPF.
(4) SYNC GATE CIRCUIT
29, and is conducted to BELL/A-BELL filter automatic adjusting circuit. Additionally, SYNC GATE pulse and sample hold
pulse are generated by the logic circuit.
(5) BGP generator circuit
In BP Mode, AGC circuit detects the scale of the signal of BGP duration (ID) so that the output of 4 times multiplier circuit be
constant. In SECAM discrimination circuit, BGP is used for making the S/H pulse (SP9, SP2 in Figure 9) mentioned later.
constant of the inside of IC to about 2.5 µs. And BGP timing can be monitored by Pin 28 in test mode (Pin 9 voltage = 5V).
Input a frequency of 4.433619MHz sine wave or rectangle waveform signal of PAL fsc to CLK input terminal. This signal is
Vertical sync signal is extracted by a synchronous separate circuit from Composite Sync signal that has been input from Pin
BGP is used for killer circuit in REC Mode, AGC circuit in PB Mode, and SECAM discrimination circuit.
Controlling Pin 4 can convert the timing for Composite Sync that is input to Pin 27. The width of BGP is determined by the
Composite sync
29
SYNC
SEPA
4.43MHz
CLOCK
V.SYNC
2
C.SYNC
BUFF
4.43MHz
CLOCK
CONTROL
LOGIC
BELL ADJUST
SECAM DET SAMPLE HOLD-3
SYNC GATE/MUTE
SECAM DET SAMPLE HOLD-1, 2
AFC
LA70100M
Fig.3
Fig.4
4.43MHz
VCO
BELL ADJUST
3
GATE
C.sync
V-MUTE
SYNC GATE
MUTE
for BELL ADJUST CLOCK
for EACH FILTER ADJUST
C.sync
700 µ s
No.7204-8/16