K4H560438E-ZC SAMSUNG [Samsung semiconductor], K4H560438E-ZC Datasheet - Page 15

• Manufacturer Part Number: K4H560438E-ZC
• Description: 256Mb E-die DDR SDRAM Specification 60 FBGA with Pb-Free (RoHS compliant)
• Manufacturer: SAMSUNG [Samsung semiconductor]

AC Timming Parameters & Specifications
DDR SDRAM 256Mb E-die (x4, x8) Pb-Free
Row cycle time
Refresh row cycle time
Row active time
RAS to CAS delay
Row precharge time
Row active to Row active delay
Write recovery time
Last data in to Read command
Col. address to Col. address delay
Clock cycle time
Clock high level width
Clock low level width
DQS-out access time from CK/CK
Output data access time from CK/CK
Data strobe edge to ouput data edge
Read Preamble
Read Postamble
CK to valid DQS-in
DQS-in setup time
DQS-in hold time
DQS falling edge to CK rising-setup time
DQS falling edge from CK rising-hold time
DQS-in high level width
DQS-in low level width
DQS-in cycle time
Address and Control Input setup time(fast)
Address and Control Input hold time(fast)
Address and Control Input setup time(slow)
Address and Control Input hold time(slow)
Data-out high impedence time from CK/CK
Data-out low impedence time from CK/CK
Input Slew Rate(for input only pins)
Input Slew Rate(for I/O pins)
Output Slew Rate(x4,x8)
Output Slew Rate Matching Ratio(rise to fall)
Parameter
CL=2.0
CL=2.5
tWPRES
tDQSCK
Symbol
tWPRE
tDQSQ
tDQSH
tSL(IO)
tRPRE
tDQSS
tDQSL
tSLMR
tRPST
tSL(O)
tWTR
tRCD
tRRD
tCCD
tDSC
tSL(I)
tRFC
tRAS
tDSS
tDSH
tWR
tRC
tCH
tRP
tCK
tCL
tAC
tHZ
tLZ
tIH
tIH
tIS
tIS
(DDR333@CL=2.5)
Min
0.45
0.45
0.75
0.25
0.35
0.35
0.75
0.75
0.67
-0.6
-0.7
-0.7
-0.7
7.5
0.9
0.4
0.2
0.2
0.9
0.8
0.8
0.5
0.5
1.0
60
72
42
18
18
12
15
1
1
6
0
-
B3
Max
0.55
0.55
+0.6
+0.7
0.45
1.25
+0.7
+0.7
70K
1.1
0.6
1.1
4.5
1.5
12
12
(DDR266@CL=2.0)
-0.75
-0.75
-0.75
-0.75
Min
0.45
0.45
0.75
0.25
0.35
0.35
0.67
7.5
7.5
0.9
0.4
0.2
0.2
0.9
0.9
0.9
1.0
1.0
0.5
0.5
1.0
65
75
45
20
20
15
15
1
1
0
-
A2
+0.75
+0.75
120K
+0.75
+0.75
Max
0.55
0.55
1.25
0.5
1.1
0.6
1.1
4.5
1.5
12
12
Rev. 1.1 October, 2004
(DDR266@CL=2.5)
-0.75
-0.75
-0.75
-0.75
Min
0.45
0.45
0.75
0.25
0.35
0.35
0.67
7.5
0.9
0.4
0.2
0.2
0.9
0.9
0.9
1.0
1.0
0.5
0.5
1.0
65
75
45
20
20
15
15
10
1
1
0
-
B0
DDR SDRAM
+0.75
+0.75
120K
+0.75
+0.75
Max
0.55
0.55
1.25
0.5
1.1
0.6
1.1
4.5
1.5
12
12
V/ns
V/ns
V/ns
Unit
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
i,5.7~9
i,5.7~9
i, 6~9
i, 6~9
Note
12
3
1
1