K4S640432H-TC SAMSUNG [Samsung semiconductor], K4S640432H-TC Datasheet
K4S640432H-TC
Related parts for K4S640432H-TC
K4S640432H-TC Summary of contents
Page 1
... SDRAM 64Mb H-die (x4, x8, x16) 64Mb H-die SDRAM Specification * Samsung Electronics reserves the right to change products or specification without notice. Revision 1.8 August 2004 CMOS SDRAM Rev. 1.8 August 2004 ...
Page 2
... SDRAM 64Mb H-die (x4, x8, x16) Revision History Revision 0.0 (May, 2003) - Target spec release Revision 0.1 (July, 2003) - Preliminary spec release Revision 0.2 (August, 2003) - Modified IBIS characteristic. Revision 1.0 (September, 2003) - Finalized. Revision 1.1 (September, 2003) - Corrected IBIS Specification. Revision 1.2 (October, 2003) - Deleted speed 7C at x4/x8. ...
Page 3
... CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications. Ordering Information Part No. K4S640432H-TC(L)75 K4S640832H-TC(L)75 K4S641632H-TC(L)60 K4S641632H-TC(L)70 K4S641632H-TC(L)75 ...
Page 4
... SDRAM 64Mb H-die (x4, x8, x16) Package Physical Dimension #54 #1 0.10 MAX 0.004 0. 0.028 #28 #27 22.62 MAX 0.891 22.22 ± 0.10 ± 0.004 0.875 0.008 +0.10 0.30 0.80 -0.05 +0.004 0.0315 0.012 -0.002 54Pin TSOP(II) Package Dimension CMOS SDRAM 0~8°C 0.25 TYP 0.010 +0.075 0.125 -0.035 +0.003 0.005 -0.001 0.21 ± 0.05 1.00 ± 0.10 1 ...
Page 5
... SDRAM 64Mb H-die (x4, x8, x16) FUNCTIONAL BLOCK DIAGRAM Bank Select CLK ADD LCKE LRAS LCBR CLK CKE Samsung Electronics reserves the right to change products or specification without notice. * Data Input Register ...
Page 6
... SDRAM 64Mb H-die (x4, x8, x16) PIN CONFIGURATION (Top view) x8 x16 DQ0 DQ0 V V DDQ DDQ DQ1 N.C DQ2 DQ1 V V SSQ SSQ DQ3 N.C DQ4 DQ2 V V DDQ DDQ DQ5 N.C DQ6 DQ3 V V SSQ SSQ DQ7 N LDQM N CAS ...
Page 7
... SDRAM 64Mb H-die (x4, x8, x16) ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative Voltage on V supply relative Storage temperature Power dissipation Short circuit current Note : Permanent device damage may occur if "ASOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to recommended operating condition. ...
Page 8
... SDRAM 64Mb H-die (x4, x8, x16) DC CHARACTERISTICS (x4, x8) (Recommended operating condition unless otherwise noted, T Parameter Symbol Operating current I CC1 (One bank active) I CC2 Precharge standby current in power-down mode I CC2 I CC2 Precharge standby current in non power-down mode I CC2 I CC3 Active standby current in power-down mode ...
Page 9
... SDRAM 64Mb H-die (x4, x8, x16) DC CHARACTERISTICS (x16) (Recommended operating condition unless otherwise noted, T Parameter Symbol Operating current I CC1 (One bank active) I CC2 Precharge standby current in power-down mode I CC2 I CC2 Precharge standby current in non power-down mode I CC2 I CC3 Active standby current in power-down mode ...
Page 10
... SDRAM 64Mb H-die (x4, x8, x16) AC OPERATING TEST CONDITIONS Parameter AC input levels (Vih/Vil) Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition 3.3V Output 870Ω (Fig output load circuit OPERATING AC PARAMETER (AC operating conditions unless otherwise noted) ...
Page 11
... SDRAM 64Mb H-die (x4, x8, x16) AC CHARACTERISTICS (AC operating conditions unless otherwise noted) Parameter CAS latency=3 CLK cycle time CAS latency=2 CAS latency=3 CLK to valid output delay CAS latency=2 CAS latency=3 Output data hold time CAS latency=2 CLK high pulse width CLK low pulse width ...
Page 12
... SDRAM 64Mb H-die (x4, x8, x16) IBIS SPECIFICATION I Characteristics (Pull-up) OH 133MHz Voltage Min (V) I (mA) 3.45 - 3.30 - 3.00 -0.35 2.70 -3.75 2.50 -6.65 1.95 -13.75 1.80 -17.75 1.65 -20.55 1.50 -23.55 1.40 -26.2 1.00 -36.25 0.20 -46.5 I Characteristics (Pull-down) OL 133MHz Voltage Min (V) I (mA) 3.45 43.92 3.30 - 3.00 43.36 1.95 41.20 1.80 40.56 1.65 39.60 1.50 38.40 1.40 37.28 1.00 30.08 0.85 26.64 0.65 21.52 0.40 14. 133MHz Max I (mA) -100 -1.68 -19.11 -200 -51.87 -90.44 -107.31 -300 -137.9 -158.34 -400 -173.6 -188.79 -199.01 -500 -241.15 -351.68 -600 250 133MHz Max ...
Page 13
... SDRAM 64Mb H-die (x4, x8, x16) V Clamp @ CLK, CKE, CS, DQM & (V) I (mA) DD 0.0 0.0 0.2 0.0 0.4 0.0 0.6 0.0 0.7 0.0 0.8 0.0 0.9 0.0 1.0 0.23 1.2 1.34 1.4 3.02 1.6 5.06 1.8 7.35 2.0 9.83 2.2 12.48 2.4 15.30 2.6 18.31 V Clamp @ CLK, CKE, CS, DQM & (V) I (mA) SS -2.6 -57.23 -2.4 -45.77 -2.2 -38.26 -2.0 -31.22 -1.8 -24.58 -1.6 -18.37 -1.4 -12.56 -1.2 -7.57 -1.0 -3.37 -0.9 -1.75 -0.8 -0.58 -0.7 -0.05 -0.6 0.0 -0.4 0.0 -0.2 0.0 0.0 0.0 Minimum V clamp current DD (Referenced Voltage I (mA) Minimum V clamp current -10 -20 -30 -40 -50 ...
Page 14
... MRS can be issued only at all banks precharge state. A new command can be issued after 2 CLK cycles of MRS. 3. Auto refresh functions are as same as CBR refresh of DRAM. The automatical precharge without row precharge command is meant by "Auto". Auto/self refresh can be issued only at all banks precharge state. ...