A54SX32A-PQ208I Actel, A54SX32A-PQ208I Datasheet

A54SX32A-PQ208I

Manufacturer Part Number

A54SX32A-PQ208I

Description

A54SX32A-PQ208I

Manufacturer

Actel

Datasheet

1.A54SX32A-2TQ176I.pdf (80 pages)

Specifications of A54SX32A-PQ208I

Lead_time

Pack_quantity

Comm_code

85423990

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

BOSTOCK HK LIMITED

Part Number:

A54SX32A-PQ208I

Manufacturer:

Microsemi SoC

Quantity:

10 000

Company:

Meier Automation Equipment Co., Limited

Part Number:

A54SX32A-PQ208I

Manufacturer:

ACTEL/爱特

Quantity:

20 000

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SX-A Family FPGAs

Le a di n g- E d ge P er f o r m a n ce

• 250 MHz System Performance

• 4.2ns Clock-to-Out (Pad-to-Pad)

• 350 MHz Internal Performance

Sp e ci f i c a t i on s

• 12,000 to 108,000 Available System Gates

• Up to 360 User-Programmable I/O Pins

• Up to 2,012 Dedicated Flip-Flops

• 0.22µ/0.25µ CMOS Process Technology

Fe a t ur es

• Hot-Swap Compliant I/Os

• Power-Up/Down Friendly (No Sequencing Required for

• 66 MHz PCI Compliant

• CPLD and FPGA Integration

• Single-Chip Solution

• Nonvolatile

SX - A P r od u ct P r o f i l e

F eb r u a r y 2 0 0 1

Capacity

Logic Modules

Maximum User I/Os

Global Clocks

Quadrant Clocks

Boundary Scan Testing

3.3V/5.0V PCI

Clock-to-Out

Input Set-Up (External)

Speed Grades

Temperature Grades

Package (by pin count)

Supply Voltages)

Typical Gates

System Gates

Combinatorial Cells

Dedicated Flip-Flops

Maximum Flip-Flops

PQFP

TQFP

PBGA

FBGA

Device

–F, Std, –1, –2, –3

A54SX08A

100, 144

12,000

4.2 ns

8,000

0 ns

768

512

256

512

130

Yes

208

144

C, I

—

–F, Std, –1, –2, –3

• Configurable I/O Support for 3.3V/5.0V PCI, 5.0V TTL, and

• 2.5V, 3.3V, and 5.0V Mixed Voltage Operation with 5.0V

• Configurable Weak-Resistor Pull-up or Pull-down for

• Individual Output Slew Rate Control

• Up to 100% Resource Utilization and 100% Pin Locking

• Very Low Power Consumption

• Deterministic, User-Controllable Timing

• Unique In-System Diagnostic and Verification Capability

• Boundary Scan Testing in Compliance with IEEE

• Secure Programming Technology Prevents Reverse

A54SX16A

100, 144

144, 256

2.5 V/3.3V LVTTL

Input Tolerance and 5.0V Drive Strength

Tristated Outputs at Power Up

with Silicon Explorer II

Standard 1149.1 (JTAG)

Engineering and Design Theft

16,000

24,000

C, I, M

4.6 ns

1,452

0 ns

924

528

990

180

Yes

208

—

–F, Std, –1, –2, –3

100, 144, 176

144, 256, 484

A54SX32A

32,000

48,000

C, I, M

4.7 ns

2,880

1,800

1,080

1,980

0 ns

249

Yes

208

329

P r e l i m i n a r y v 1 . 2

–F, Std, –1, –2, –3

A54SX72A

256, 484

108,000

72,000

C, I, M

5.8 ns

6,036

4,024

2,012

4,024

0 ns

360

Yes

208

—

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