C8051F381-GQR Silicon Laboratories Inc, C8051F381-GQR Datasheet - Page 13

• Manufacturer Part Number: C8051F381-GQR
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051F381-GQR

• Lead_time: 84
• Pack_quantity: 500
• Comm_code: 85423190

C8051F380/1/2/3/4/5/6/7
SFR Definition 18.2. OSCICL: Internal H-F Oscillator Calibration .............................. 142
SFR Definition 18.3. OSCICN: Internal H-F Oscillator Control ................................... 143
SFR Definition 18.4. CLKMUL: Clock Multiplier Control ............................................. 144
SFR Definition 18.5. OSCLCN: Internal L-F Oscillator Control ................................... 145
SFR Definition 18.6. OSCXCN: External Oscillator Control ........................................ 149
SFR Definition 19.1. XBR0: Port I/O Crossbar Register 0 .......................................... 156
SFR Definition 19.2. XBR1: Port I/O Crossbar Register 1 .......................................... 157
SFR Definition 19.3. XBR2: Port I/O Crossbar Register 2 .......................................... 158
SFR Definition 19.4. P0: Port 0 ................................................................................... 159
SFR Definition 19.5. P0MDIN: Port 0 Input Mode ....................................................... 159
SFR Definition 19.6. P0MDOUT: Port 0 Output Mode ................................................ 160
SFR Definition 19.7. P0SKIP: Port 0 Skip ................................................................... 160
SFR Definition 19.8. P1: Port 1 ................................................................................... 161
SFR Definition 19.9. P1MDIN: Port 1 Input Mode ....................................................... 161
SFR Definition 19.10. P1MDOUT: Port 1 Output Mode .............................................. 162
SFR Definition 19.11. P1SKIP: Port 1 Skip ................................................................. 162
SFR Definition 19.12. P2: Port 2 ................................................................................. 163
SFR Definition 19.13. P2MDIN: Port 2 Input Mode ..................................................... 163
SFR Definition 19.14. P2MDOUT: Port 2 Output Mode .............................................. 164
SFR Definition 19.15. P2SKIP: Port 2 Skip ................................................................. 164
SFR Definition 19.16. P3: Port 3 ................................................................................. 165
SFR Definition 19.17. P3MDIN: Port 3 Input Mode ..................................................... 165
SFR Definition 19.18. P3MDOUT: Port 3 Output Mode .............................................. 166
SFR Definition 19.19. P3SKIP: Port 3 Skip ................................................................. 166
SFR Definition 19.20. P4: Port 4 ................................................................................. 167
SFR Definition 19.21. P4MDIN: Port 4 Input Mode ..................................................... 167
SFR Definition 19.22. P4MDOUT: Port 4 Output Mode .............................................. 168
SFR Definition 20.1. USB0XCN: USB0 Transceiver Control ...................................... 171
SFR Definition 20.2. USB0ADR: USB0 Indirect Address ........................................... 173
SFR Definition 20.3. USB0DAT: USB0 Data .............................................................. 174
USB Register Definition 20.4. INDEX: USB0 Endpoint Index ..................................... 176
USB Register Definition 20.5. CLKREC: Clock Recovery Control .............................. 177
USB Register Definition 20.6. FIFOn: USB0 Endpoint FIFO Access .......................... 179
USB Register Definition 20.7. FADDR: USB0 Function Address ............................... 180
USB Register Definition 20.8. POWER: USB0 Power ................................................ 182
USB Register Definition 20.9. FRAMEL: USB0 Frame Number Low ......................... 183
USB Register Definition 20.10. FRAMEH: USB0 Frame Number High ...................... 183
USB Register Definition 20.11. IN1INT: USB0 IN Endpoint Interrupt ......................... 184
USB Register Definition 20.12. OUT1INT: USB0 OUT Endpoint Interrupt ................. 185
USB Register Definition 20.13. CMINT: USB0 Common Interrupt ............................. 186
USB Register Definition 20.14. IN1IE: USB0 IN Endpoint Interrupt Enable ............... 187
USB Register Definition 20.15. OUT1IE: USB0 OUT Endpoint Interrupt Enable ....... 188
USB Register Definition 20.16. CMIE: USB0 Common Interrupt Enable .................... 189
USB Register Definition 20.17. E0CSR: USB0 Endpoint0 Control ............................. 192
USB Register Definition 20.18. E0CNT: USB0 Endpoint0 Data Count ....................... 193
Rev. 1.0
13