SX1231 SEMTECH [Semtech Corporation], SX1231 Datasheet - Page 36

• Manufacturer Part Number: SX1231
• Description: Low Power Integrated UHF Transceiver
• Manufacturer: SEMTECH [Semtech Corporation]

Note
4.2.4. Rx Start Procedure
As described in the former sections, the RxReady interrupt warns the uC that the receiver is ready.
4.2.5. Optimized Frequency Hopping Sequences
In a frequency hopping-like application, it is required to turn off the transmitter when hopping from one channel to another,
to avoid spectral splatter and obtain the best spectral purity.
(0) SX1231 is in Tx mode in Ch A
(1) Program the SX1231 in Rx mode
(2) Change the carrier frequency in the RegFrf registers
(3) Wait for TS_HOP (timing corresponding the frequency offset, the PllLock flag can also be used)
(4) Turn the transceiver back to Tx mode
(5) Respect the Tx start procedure, described in section 4.2.2
(0) SX1231 is in Rx mode in Ch A
(1) Program the SX1231 in FS mode
(2) Change the carrier frequency in the RegFrf registers
(3) Wait for TS_HOP (timing corresponding the frequency offset, the PllLock flag can also be used)
(4) Turn the transceiver back to Rx mode
(5) Respect the Rx start procedure, described in section 4.2.4
Rev 2 - Nov 2009
ADVANCED COMMUNICATIONS & SENSING
In Continuous mode with Bit Synchronizer, the receiver will start locking its Bit Synchronizer on a minimum or 12 bits of
received preamble (see section 3.5.12 for details), before the reception of correct Data, or Sync Word (if enabled) can
occur.
In Continuous mode without Bit Synchronizer, valid data will be available on DIO2/DATA right after the RxReady
interrupt.
In Packet mode, the receiver will start locking its Bit Synchronizer on a minimum or 12 bits of received preamble (see
section 3.5.12 for details), before the reception of correct Data, or Sync Word (if enabled) can occur.
Transmitter hop from Ch A to Ch B: it is advised to step through the Rx mode:
Receiver hop from Ch A to Ch B:
For time-critical applications, a single RSSI evaluation can be done prior to the reception (AGC disabled), or prior
to the AGC procedure. This can be achieved by setting bit FastRx in RegRssiConfig to 1, and saves the equivalent
of 2 x Tbit
Page 36
DATASHEET
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SX1231