MT8888CC-1 MITEL [Mitel Networks Corporation], MT8888CC-1 Datasheet - Page 10

• Manufacturer Part Number: MT8888CC-1
• Description: Integrated DTMFTransceiver with Intel Micro Interface
• Manufacturer: MITEL [Mitel Networks Corporation]

MT8888C/MT8888C-1
4-100
BIT
Notes:
R1, R2 = 100 k 1%
R3 = 374
R4 = 3.3 k 10%
R
C1 = 100 nF 5%
C2 = 100 nF 5%
C3 = 100 nF 10%*
X-tal = 3.579545 MHz
b0
b1
b2
b3
DTMF
OUTPUT
DTMF/CP
INPUT
L
= 10 k
TRANSMIT DATA
REGISTER EMPTY
(BURST MODE ONLY)
RECEIVE DATA REGISTER
FULL
DELAYED STEERING
1%
(min.)
C1
NAME
Figure 12 - MT8888C Interface Connections for Various Intel Micros
IRQ
R1
Figure 13 - Application Circuit (Single-Ended Input)
R2
8031/8051
8080/8085
X-tal
R
L
A8-A15
Table 8
WR
PO
RD
Interrupt has occurred. Bit one
(b1) or bit two (b2) is set.
and transmitter is ready for new
data.
Valid data is in the Receive Data
Register.
Set upon the valid detection of
the absence of a DTMF signal.
Pause duration has terminated
* Microprocessor based systems can inject undesirable noise into the supply rails.
The performance of the MT8888C/MT8888C-1 can be optimized by keeping
noise on the supply rails to a minimum. The decoupling capacitor (C3) should be
connected close to the device and ground loops should be avoided.
.
A8
STATUS FLAG SET
Status Register Description
MT8888C/MT8888C-1
IN+
IN-
GS
VRef
VSS
OSC1
OSC2
TONE
WR
CS
IRQ/CP
St/GT
VDD
RS0
MT8888C/MT8888C-1
ESt
RD
D3
D2
D1
D0
CS
RS0
D0-D3
RD
WR
R3
Interrupt is inactive. Cleared after
Status Register is read.
Cleared after Status Register is
read or when in non-burst mode.
Cleared after Status Register is
read.
Cleared upon the detection of a
valid DTMF signal.
STATUS FLAG CLEARED
C2
V
R4
DD
C3
To P
or C