74HC237N,652 NXP Semiconductors, 74HC237N,652 Datasheet - Page 7

• Manufacturer Part Number: 74HC237N,652
• Description: IC DECODER/DEMUX 3-8LINE 16DIP
• Manufacturer: NXP Semiconductors
• Series: 74HCr
• Type: Decoder/Demultiplexerr

Specifications of 74HC237N,652

• Package / Case: 16-DIP (0.300", 7.62mm)
• Circuit: 1 x 3:8
• Independent Circuits: 1
• Current - Output High, Low: 5.2mA, 5.2mA
• Voltage Supply Source: Single Supply
• Voltage - Supply: 2 V ~ 6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Through Hole
• Logic Family: 74HC
• Number Of Bits: 3
• Number Of Lines (input / Output): 6.0 / 8.0
• Propagation Delay Time: 38 ns
• Supply Voltage (max): 6 V
• Supply Voltage (min): 2 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: Through Hole
• Number Of Input Lines: 6.0
• Number Of Output Lines: 8.0
• Power Dissipation: 750 mW
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-1416-5; 74HC237N; 933757180652

NXP Semiconductors
Table 7.
Voltages are referenced to GND (ground = 0 V); C
[1]
[2]
[3]
11. Waveforms
74HC237
Product data sheet
Symbol Parameter
t
t
t
C
W
su
h
Fig 7.
PD
t
t
C
P
f
f
C
V
N = number of inputs switching;
(C
pd
t
i
o
D
CC
PD
= input frequency in MHz;
L
is the same as t
= output frequency in MHz;
is the same as t
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
 V
pulse width
set-up time
hold time
power
dissipation
capacitance
Measurement points are given in
V
Propagation delay input (An) and enable inputs (E2, LE) to output (Yn) and output transition time
PD
OL
Dynamic characteristics
CC
 V
and V
2
 f
CC
o
2
) = sum of outputs.
OH
 f
THL
PLH
i
are typical voltage output levels that occur with the output load.
 N + (C
and t
Conditions
LE HIGH; see
An to LE; see
An to LE; see
C
V
and t
I
L
V
V
V
V
V
V
V
V
V
= GND to V
= 50 pF; f = 1 MHz;
TLH
CC
CC
CC
CC
CC
CC
CC
CC
CC
PHL
.
= 2.0 V
= 4.5 V
= 6.0 V
= 2.0 V
= 4.5 V
= 6.0 V
= 2.0 V
= 4.5 V
= 6.0 V
L
.
 V
An, E2, LE
input
Yn output
CC
2
…continued
Figure 9
Figure 9
CC
Figure 9
 f
Table
o
All information provided in this document is subject to legal disclaimers.
) where:
8.
V
M
Rev. 4 — 10 January 2011
L
t
t
THL
PHL
= 50 pF unless otherwise specified; for test circuit see
[3]
D
Min
V
in W).
50
10
50
10
30
3-to-8 line decoder, demultiplexer with address latches
9
9
6
5
M
-
T
amb
Typ
= 25 C
60
11
4
3
6
2
2
3
1
1
Max
-
-
-
-
-
-
-
-
-
-
t
PLH
Min
T
65
13
11
65
13
11
40
001aab873
8
7
amb
-
to +85 C
= 40 C
t
TLH
Max
-
-
-
-
-
-
-
-
-
-
-
Min
T
75
15
13
75
15
13
45
9
8
-
amb
to +125 C
74HC237
© NXP B.V. 2011. All rights reserved.
= 40 C
Figure
Max
-
-
-
-
-
-
-
-
-
-
10.
7 of 17
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF