CD4066BCM Fairchild Semiconductor, CD4066BCM Datasheet - Page 3

IC SWITCH BILATERAL QUAD 14-SOIC

CD4066BCM

Manufacturer Part Number
CD4066BCM
Description
IC SWITCH BILATERAL QUAD 14-SOIC
Manufacturer
Fairchild Semiconductor
Series
4000Br
Type
Bilateral, FET Switchesr
Datasheet

Specifications of CD4066BCM

Circuit
1 x 1:1
Independent Circuits
4
Voltage Supply Source
Dual Supply
Voltage - Supply
3 V ~ 15 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Switch Configuration
SPST
On Resistance (max)
1050 Ohms
On Time (max)
125 ns
Off Time (max)
125 ns
Supply Voltage (max)
15 V
Supply Voltage (min)
3 V
Maximum Power Dissipation
500 mW
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Propagation Delay Time
55 ns
Multiplexer Configuration
Quad SPST
Number Of Inputs
4
Number Of Outputs
4
Number Of Channels
4
Analog Switch On Resistance
1050@5VOhm
Analog Switch Turn On Time
125ns
Analog Switch Turn Off Time
125ns
Package Type
SOIC N
Power Supply Requirement
Single
Single Supply Voltage (min)
3V
Single Supply Voltage (typ)
5/9/12V
Single Supply Voltage (max)
15V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Power Dissipation
500mW
Mounting
Surface Mount
Pin Count
14
Operating Temp Range
-55C to 125C
Operating Temperature Classification
Military
Dc
08+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output High, Low
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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t
t
t
PHL
PZH
PHZ
C
C
C
C
AC Electrical Characteristics
T
Note 3: AC Parameters are guaranteed by DC correlated testing.
Note 4: These devices should not be connected to circuits with the power “ON”.
Note 5: In all cases, there is approximately 5 pF of probe and jig capacitance in the output; however, this capacitance is included in C
specified.
Note 6: V
Note 7: Conditions for V
Symbol
IS
OS
IOS
IN
A
, t
, t
, t
PLH
PZL
PLZ
25 C, t
IS
is the voltage at the in/out pin and V
Propagation Delay Time Signal
Input to Signal Output
Propagation Delay Time
Control Input to Signal
Output High Impedance to
Logical Level
Propagation Delay Time
Control Input to Signal
Output Logical Level to
High Impedance
Sine Wave Distortion
Frequency Response-Switch
“ON” (Frequency at 3 dB)
Feedthrough — Switch “OFF”
(Frequency at 50 dB)
Crosstalk Between Any Two
Switches (Frequency at 50 dB)
Crosstalk; Control Input to
Signal Output
Maximum Control Input
Signal Input Capacitance
Signal Output Capacitance
Feedthrough Capacitance
Control Input Capacitance
r
t
f
20 ns and V
IHC
Parameter
: a) V
IS
V
DD
SS
, I
OS
0V unless otherwise noted
OS
standard B series I
is the voltage at the out/in pin. V
V
R
V
V
V
R
V
V
V
R
V
V
V
V
R
V
R
20 Log
(Figure 4)
V
R
V
V
R
V
V
V
(Figure 6)
R
V
V
V
V
V
V
C
DD
DD
DD
DD
DD
DD
DD
DD
DD
C
C
DD
OS
DD
OS(B)
DD
CC
OS(f)
DD
DD
DD
DD
C
L
L
L
L
L
L
L
L
1 k , V
/V
200k
1.0 k , C
1.0 k , C
10 k , V
1 k , V
1 k , V
1.0 k , C
V
V
V
0V
IS
5V
10V
15V
5V
10V
15V
5V
10V
15V
5.0V, V
V
/V
10V, R
10V Square Wave, C
5.0V
10V
15V
10V
DD
DD
DD
10
C(A)
(Note 3)
½ V
IS(A)
, C
V
IS(A)
OH
OS
50 dB, (Figure 4)
5V, V
5V, V
L
OS
IS
IS
L
/V
IS
CC
5.0V; V
L
L
L
(1.0 kHz)
50 pF, (Figure 1)
OS
50 dB (Figure 5)
5V
5.0V
5.0 V
10 k , R
SS
SS
Conditions
b) V
50 pF, (Figure 2, Figure 3)
50 pF, (Figure 2, Figure 3)
5V
50 pF, (Figure 7)
(1 kHz) dB,
V
p-p
SS
p-p
3
IS
p-p
SS
p-p
,
5V
, f 1 kHz, (Figure 4)
5V,
, 20 Log
, 20 Log
0V, I
IN
C
5.0V,
V
is the voltage at the control input.
L
C(B)
OL
1.0 k ,
50 pF
10
10
standard B series I
,
5.0V,
,
OL
Min
.
1.25
Typ
150
0.1
0.9
6.0
8.0
8.5
8.0
8.0
0.5
5.0
25
15
10
40
www.fairchildsemi.com
L
wherever it is
Max
125
125
7.5
55
35
25
60
50
60
50
mV
Units
MHz
MHz
MHz
MHz
MHz
%
pF
pF
pF
pF
ns
ns
ns
ns
ns
ns
ns
ns
ns
p-p

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