GS72116AGP-8I GSI Technology, GS72116AGP-8I Datasheet

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GS72116AGP-8I

Manufacturer Part Number
GS72116AGP-8I
Description
Manufacturer
GSI Technology
Datasheet

Specifications of GS72116AGP-8I

Pack_quantity
135
Comm_code
85423245
Lead_time
56

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
GS72116AGP-8I
Manufacturer:
Macronix
Quantity:
1 236
SOJ, TSOP, FP-BGA, TQFP
Commercial Temp
Industrial Temp
Features
• Fast access time: 7, 8, 10, 12 ns
• CMOS low power operation: 145/125/100/85 mA at
• Single 3.3 V power supply
• All inputs and outputs are TTL-compatible
• Byte control
• Fully static operation
• Industrial Temperature Option: –40° to 85°C
• Package line up
Description
The GS72116A is a high speed CMOS Static RAM organized
as 131,072 words by 16 bits. Static design eliminates the need
for external clocks or timing strobes. The GS operates on a
single 3.3 V power supply and all inputs and outputs are TTL-
compatible. The GS72116A is available in a 6 mm x 8 mm
Fine Pitch BGA package, a 10 mm x 10 mm TQFP package, as
well as in 400 mil SOJ and 400 mil TSOP Type-II packages.
Rev: 1.09 10/2007
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
minimum cycle time
J:
GJ: RoHS-compliant 400 mil, 44-pin SOJ package
TP: 400 mil, 44-pin TSOP Type II package
GP: RoHS-compliant 400 mil, 44-pin TSOP Type II
T:
GT: RoHS-compliant 10 mm x 10 mm, 44-pin TQFP
U:
GU: RoHS-compliant 6 mm x 8 mm Fine Pitch Ball Grid
400 mil, 44-pin SOJ package
package
10 mm x 10 mm, 44-pin TQFP
6 mm x 8 mm Fine Pitch Ball Grid Array package
Array package
2Mb Asynchronous SRAM
1/18
128K x 16
Pin Descriptions
DQ6
DQ7
DQ
DQ
DQ
DQ
DQ
DQ
DQ
V
A
V
Symbol
WE
A
A
A
A
CE
A
A
A
A
A
DD
12
SS
15
14
13
16
A
4
3
2
1
0
1
2
3
4
5
8
0
1
V
WE
V
CE
UB
OE
NC
LB
–A
–DQ
SOJ 128K x 16-Pin Configuration
DD
SS
16
16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
Package J
Top view
44-pin
SOJ
Lower byte enable input
Upper byte enable input
+3.3 V power supply
Output enable input
Write enable input
Chip enable input
Data input/output
GS72116ATP/J/T/U
(DQ9 to DQ16)
Description
Address input
(DQ1 to DQ8)
No connect
Center V
© 2001, GSI Technology
Ground
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
7, 8, 10, 12 ns
DD
A
A
A
OE
UB
LB
DQ
DQ
DQ
DQ
V
V
DQ
DQ
DQ
DQ
NC
A
A
A
A
NC
5
6
7
SS
DD
8
9
10
11
3.3 V V
16
15
14
13
12
11
10
9
and V
DD
SS

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