74ABT899CQCX Fairchild Semiconductor, 74ABT899CQCX Datasheet - Page 5

TXRX W/GENERATOR&CHECKER 28PLCC

74ABT899CQCX

Manufacturer Part Number
74ABT899CQCX
Description
TXRX W/GENERATOR&CHECKER 28PLCC
Manufacturer
Fairchild Semiconductor
Series
74ABTr
Datasheet

Specifications of 74ABT899CQCX

Logic Type
Parity Generator/Checker
Number Of Circuits
9-Bit
Current - Output High, Low
32mA, 64mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74ABT899CQCX
Manufacturer:
Fairchild Semiconductor
Quantity:
10 000
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
V
V
V
V
V
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
PLH
DC Electrical Characteristics
(PLCC package)
Note 6: Max number of outputs defined as (n). n
Note 7: Max number of data inputs (n) switching. n
Guaranteed, but not tested.
Note 8: Max number of outputs defined as (n). n
AC Electrical Characteristics
(SOIC and PLCC Package)
Symbol
OLP
OLV
OHV
IHD
ILD
Symbol
t
PHL
Quiet Output Maximum Dynamic V
Quiet Output Minimum Dynamic V
Minimum HIGH Level Dynamic Output Voltage
Minimum HIGH Level Dynamic Input Voltage
Maximum LOW Level Dynamic Input Voltage
Propagation Delay
A
Propagation Delay
A
Propagation Delay
A
Propagation Delay
APAR, BPAR to ERRA, ERRB
Propagation Delay
ODD/EVEN to APAR, BPAR
Propagation Delay
ODD/EVEN to ERRA, ERRB
Propagation Delay
SEL to APAR, BPAR
Propagation Delay
LEA, LEB to B
Propagation Delay
LEA, LEB to BPAR, APAR
Generate Mode
Propagation Delay
LEA, LEB to BPAR, APAR,
Feed Thru Mode
Propagation Delay
LEA, LEB to ERRA, ERRB
Output Enable Time
GBA or GAB to A
APAR or B
Output Disable Time
GBA or GAB to A
APAR or B
Propagation Delay
APAR to BPAR, BPAR to APAR
n
n
n
, to B
, B
, B
n
n
to BPAR, APAR
to ERRA, ERRB
n
n
n
, BPAR
, BPAR
Parameter
n
, A
Parameter
n
n
n
,
,
OL
OL
1 data inputs are driven 0V to 3V. One output at LOW. Guaranteed, but not tested.
1 data inputs are driven 0V to 3V. One output HIGH. Guaranteed, but not tested.
1 inputs switching 0V to 3V. Input-under-test switching: 3V to threshold (V
Min
2.5
2.2
1.3
Min
1.5
1.5
2.5
2.5
2.5
2.5
1.5
1.5
2.0
2.0
1.8
1.8
1.5
1.5
1.5
1.5
2.5
2.5
1.5
1.5
1.6
1.6
1.5
1.5
1.0
1.0
1.5
1.5
5
Typ
V
0.8
3.0
1.8
0.8
T
0.8
C
CC
A
L
Typ
3.0
3.5
5.9
5.8
5.4
5.4
3.7
3.7
4.4
4.4
4.0
4.0
3.8
3.8
3.2
3.2
5.9
5.7
3.6
3.6
5.4
5.4
3.6
3.4
4.0
3.3
3.3
3.8
50 pF
25 C
5.0V
Max
1.1
0.5
Max
4.8
4.8
9.2
9.2
8.5
8.5
6.0
6.0
6.9
6.9
6.0
6.0
6.0
6.0
4.6
4.6
8.8
8.8
5.1
5.1
8.4
8.4
6.0
6.0
6.0
6.0
5.4
5.4
Units
V
V
V
V
V
T
A
Min
1.5
1.5
2.5
2.5
2.5
2.5
1.5
1.5
2.0
2.0
1.8
1.8
1.5
1.5
1.5
1.5
2.5
2.5
1.5
1.5
1.6
1.6
1.5
1.5
1.0
1.0
1.5
1.5
V
V
CC
5.0
5.0
5.0
5.0
5.0
CC
C
40 C to 85 C
L
4.5V–5.5V
ILD
50 pF
T
T
T
T
T
), 0V to threshold (V
A
A
A
A
A
C
www.fairchildsemi.com
L
Max
4.8
4.8
9.2
9.2
8.5
8.5
6.0
6.0
6.9
6.9
6.0
6.0
6.0
6.0
4.6
4.6
8.8
8.8
5.1
5.1
8.4
8.4
6.0
6.0
6.0
6.0
5.4
5.4
25 C (Note 6)
25 C (Note 6)
25 C (Note 8)
25 C (Note 7)
25 C (Note 7)
50 pF, R
Conditions
L
Units
500
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
IHD
).

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