IS93C46-3GR Integrated Silicon Solution, IS93C46-3GR Datasheet

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IS93C46-3GR

Manufacturer Part Number
IS93C46-3GR
Description
Manufacturer
Integrated Silicon Solution
Datasheet

Specifications of IS93C46-3GR

Case
SOP3.9mm
Date_code
1995

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Manufacturer
Quantity
Price
Part Number:
IS93C46-3GR
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SONY
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Part Number:
IS93C46-3GR
Manufacturer:
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Quantity:
20 000
Part Number:
IS93C46-3GRI
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IS93C46-3
1,024-BIT SERIAL ELECTRICALLY
ERASABLE PROM
FEATURES
• State-of-the-art architecture
• Low voltage read operation
• Hardware and software write protection
• Advanced low voltage CMOS E
• Versatile, easy-to-use Interface
• Durable and reliable
FUNCTIONAL BLOCK DIAGRAM
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any
errors which may appear in this publication. © Copyright 2001, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. G
04/26/01
D
— Non-volatile data storage
— Low voltage operation:
— Full TTL compatible inputs and outputs
— Auto increment for efficient data dump
— Down to 2.7V
— Defaults to write-disabled state at power-up
— Software instructions for write-enable/disable
technology
— Self-timed programming cycle
— Automatic erase-before-write
— Programming status indicator
— Word and chip erasable
— Stop SK anytime for power savings
— 10-year data retention after 100K write cycles
— 100,000 write cycles
— Unlimited read cycles
IN
CS
SK
3.0V (Vcc = 2.7V to 6.0V)
INSTRUCTION
REGISTER
(9 BITS)
INSTRUCTION
GENERATION
CONTROL,
DECODE,
CLOCK
AND
2
PROM
REGISTER
REGISTER
ADDRESS
(16 BITS)
ENABLE
WRITE
DATA
OVERVIEW
The IS93C46-3 is a low cost 1,024-bit, non-volatile, serial
E
E
non-volatile read/write memory arranged as 64 registers
of 16 bits each. Seven 9-bit instructions control the
operation of the device, which includes read, write, and
mode enable functions. The data out pin (D
the status of the device during in the self-timed non-
volatile programming cycle.
The self-timed write cycle includes an automatic erase-
before-write capability. To protect against inadvertent
writes, the WRITE instruction is accepted only while the
chip is in the write enabled state. Data is written in 16 bits
per write instruction into the selected register. If Chip
Select (CS) is brought HIGH after initiation of the write
cycle, the Data Output (D
BUSY status of the chip.
APPLICATIONS
The IS93C46-3 is ideal for high-volume applications
requiring low power and low density storage. This device
uses a low cost, space saving 8-pin package. Candidate
applications include robotics, alarm devices, electronic
locks, meters and instrumentation settings.
2
2
PROM. It is fabricated using
PROM technology. The IS93C46-3 provides efficient
DUMMY
AMPS
R/W
BIT
HIGH VOLTAGE
DECODER
GENERATOR
1 OF 64
OUT
) pin will indicate the READY/
ISSI
ISSI’s
MARCH 2001
advanced CMOS
OUT
EEPROM
(64 X 16)
ARRAY
) indicates
D
OUT
®
1

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