74VHC221AMTC Fairchild Semiconductor, 74VHC221AMTC Datasheet - Page 4

• Manufacturer Part Number: 74VHC221AMTC
• Description: MULTIVIBRATOR DUAL MONO 16TSSOP
• Manufacturer: Fairchild Semiconductor
• Series: 74VHCr

Specifications of 74VHC221AMTC

• Logic Type: Monostable
• Independent Circuits: 2
• Schmitt Trigger Input: No
• Propagation Delay: 8.1ns
• Current - Output High, Low: 8mA, 8mA
• Voltage - Supply: 2 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Logic Family: VHC
• High Level Output Current: -8mA
• Low Level Output Current: 8mA
• Quiescent Current: 4uA
• Number Of Elements: 2
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Technology: CMOS
• Abs. Propagation Delay Time: 29.5ns
• Operating Supply Voltage (min): 2V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

©1994 Fairchild Semiconductor Corporation
74VHC221A Rev. 1.2
Functional Description
1. Stand-by State
2. Trigger Operation
The external capacitor (Cx) is fully charged to V
the Stand-by State. That means, before triggering,
the Q
Rx/Cx node are in the off state. Two comparators that
relate to the timing of the output pulse, and two refer-
ence voltage supplies turn off. The total supply cur-
rent is only leakage current.
Trigger operation is effective in any of the following
three cases. First, the condition where the A input is
LOW, and B input has a rising signal; second, where
the B input is HIGH, and the A input has a falling sig-
nal; and third, where the A input is LOW and the B
input is HIGH, and the CLR input has a rising signal.
After a trigger becomes effective, comparators C1
and C2 start operating, and Q
external capacitor discharges through Q
age level at the Rx/Cx node drops. If the Rx/Cx volt-
age level falls to the internal reference voltage V
the output of C1 becomes LOW. The flip-flop is then
reset and Q
C2 continues operating.
After Q
starts rising at a rate determined by the time constant
of external capacitor Cx and resistor Rx.
P
and Q
N
turns off, the voltage at the Rx/Cx node
N
N
turns off. At that moment C1 stops but
transistors which are connected to the
N
is turned on. The
N
. The volt-
CC
ref
L,
in
4
3. Reset Operation
Upon triggering, output Q becomes HIGH, following
some delay time of the internal F/F and gates. It stays
HIGH even if the voltage of Rx/Cx changes from fall-
ing to rising. When Rx/Cx reaches the internal refer-
ence voltage V
the output Q goes LOW and C2 stops its operation.
That means, after triggering, when the voltage level
of the Rx/Cx node reaches V
MONOSTABLE state.
With large values of Cx and Rx, and ignoring the dis-
charge time of the capacitor and internal delays of
the IC, the width of the output pulse, t
follows:
t
In normal operation, the CLR input is held HIGH. If
CLR is LOW, a trigger has no affect because the Q
output is held LOW and the trigger control F/F is
reset. Also, Q
V
This means if CLR is set LOW, the IC goes into a wait
state.
W
CC
(OUT)
.
1.0 Cx Rx
p
ref
turns on and Cx is charged rapidly to
H, the output of C2 becomes LOW,
ref
H, the IC returns to its
W
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(OUT), is as