MC74LCX573DTR2 ON Semiconductor, MC74LCX573DTR2 Datasheet

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MC74LCX573DTR2

Manufacturer Part Number
MC74LCX573DTR2
Description
IC LATCH OCT 3ST LV CMOS 20TSSOP
Manufacturer
ON Semiconductor
Series
74LCXr
Datasheet

Specifications of MC74LCX573DTR2

Logic Type
D-Type Transparent Latch
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
2 V ~ 3.6 V
Independent Circuits
1
Delay Time - Propagation
1.5ns
Current - Output High, Low
24mA, 24mA
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
MC74LCX573DTR2OS

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC74LCX573DTR2
Manufacturer:
ON/安森美
Quantity:
20 000
Part Number:
MC74LCX573DTR2G
Manufacturer:
ON/安森美
Quantity:
20 000
MC74LCX573
Low-Voltage CMOS
Octal Transparent Latch
Flow Through Pinout
With 5 V-Tolerant Inputs and Outputs
(3-State, Non-Inverting)
transparent latch operating from a 2.3 to 3.6 V supply. High
impedance TTL compatible inputs significantly reduce current
loading to input drivers while TTL compatible outputs offer improved
switching noise performance. A V
MC74LCX573 inputs to be safely driven from 5.0 V devices.
outputs. When the Latch Enable (LE) input is HIGH, data on the Dn
inputs enters the latches. In this condition, the latches are transparent,
i.e., a latch output will change state each time its D input changes.
When LE is LOW, the latches store the information that was present
on the D inputs a setup time preceding the HIGH-to-LOW transition
of LE. The 3-state standard outputs are controlled by the Output
Enable (OE) input. When OE is LOW, the standard outputs are
enabled. When OE is HIGH, the standard outputs are in the high
impedance state, but this does not interfere with new data entering into
the latches. The LCX573 flow through design facilitates easy PC
board layout.
Features
© Semiconductor Components Industries, LLC, 2008
March, 2008 - Rev. 8
The MC74LCX573 is a high performance, non-inverting octal
The MC74LCX573 contains 8 D-type latches with 3-state standard
Substantially Reduces System Power Requirements
Designed for 2.3 to 3.6 V V
5.0 V Tolerant - Interface Capability With 5.0 V TTL Logic
Supports Live Insertion and Withdrawal
I
LVTTL Compatible
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current in All Three Logic States (10 mA)
Latchup Performance Exceeds 500 mA
ESD Performance:
Pb-Free Packages are Available
OFF
Specification Guarantees High Impedance When V
Human Body Model >2000 V
Machine Model >200 V
CC
Operation
I
specification of 5.5 V allows
CC
1
= 0 V
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
DW SUFFIX
CASE 751D
CASE 948E
SOEIAJ-20
DT SUFFIX
TSSOP-20
CASE 967
M SUFFIX
SOIC-20
A
L, WL
Y, YY
W, WW
G
G
(Note: Microdot may be in either location)
ORDERING INFORMATION
http://onsemi.com
=
=
=
=
= Pb-Free Package
= Pb-Free Package
Publication Order Number:
20
20
1
1
Assembly Location
Wafer Lot
Year
Work Week
DIAGRAMS
MARKING
AWLYYWWG
AWLYWWG
74LCX573
MC74LCX573/D
ALYWG
LCX573
LCX
573
G

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MC74LCX573DTR2 Summary of contents

Page 1

MC74LCX573 Low-Voltage CMOS Octal Transparent Latch Flow Through Pinout With 5 V-Tolerant Inputs and Outputs (3-State, Non-Inverting) The MC74LCX573 is a high performance, non-inverting octal transparent latch operating from a 2.3 to 3.6 V supply. High impedance TTL compatible inputs ...

Page 2

Figure 1. Pinout (Top View) PIN NAMES PINS FUNCTION OE Output ...

Page 3

... ORDERING INFORMATION Device MC74LCX573DW MC74LCX573DWG MC74LCX573DWR2 MC74LCX573DWR2G MC74LCX573DT MC74LCX573DTG MC74LCX573DTR2 MC74LCX573DTR2G MC74LCX573M MC74LCX573MG MC74LCX573MEL †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb-Free. MC74LCX573 Value -0.5 to +7.0 -0.5 ≤ ...

Page 4

DC ELECTRICAL CHARACTERISTICS Symbol Characteristic V HIGH Level Input IH Voltage (Note 2) V LOW Level Input IL Voltage (Note 2) 2.3 V ≤ HIGH Level Out‐ OH put Voltage 2.3 V ≤ V ...

Page 5

DYNAMIC SWITCHING CHARACTERISTICS Symbol Characteristic V Dynamic LOW Peak Voltage OLP (Note 4) V Dynamic LOW Valley Voltage OLV (Note 4) 4. Number of outputs defined as “n”. Measured with “n-1” outputs switching from HIGH-to-LOW or LOW-to-HIGH. The remaining output ...

Page 6

MC74LCX573 PULSE GENERATOR R T TEST PLH PHL PZL PLZ Open Collector/Drain t and t PLH PHL PZH PHZ = 3.3 0 equivalent (includes jig and probe capacitance) C ...

Page 7

20X T 0. 18X A1 T MC74LCX573 PACKAGE DIMENSIONS SO-20 WB CASE 751D-05 ISSUE G q NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET ...

Page 8

... PIN 1 IDENT 1 0.15 (0.006 - 0.100 (0.004) -T- SEATING PLANE 16X 0.36 *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. MC74LCX573 PACKAGE DIMENSIONS TSSOP-20 CASE 948E-02 ISSUE Í Í Í Í Í ...

Page 9

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT:  Literature Distribution Center for ON Semiconductor  P.O. Box 5163, Denver, Colorado 80217 USA  Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada  Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada   ...

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