MC100EP52DT ON Semiconductor, MC100EP52DT Datasheet

MC100EP52DT

Manufacturer Part Number

MC100EP52DT

Description

Manufacturer

ON Semiconductor

Datasheets

1.MC100EP52MNR4.pdf (12 pages)

2.MC100EP52D.pdf (10 pages)

Specifications of MC100EP52DT

Case

MSOP-8

Date_code

05+

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MC100EP52DTG

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MC10EP52, MC100EP52

3.3V / 5V ECL Differential

Data and Clock D Flip−Flop

flip−flop. The device is pin and functionally equivalent to the EL52

device.

LOW and is transferred to the slave, and thus the outputs, upon a

positive transition of the clock. The differential clock inputs of the

EP52 allow the device to also be used as a negative edge triggered

device.

conditions (pulled down to V

stable.

June, 2004 − Rev. 3

The MC10EP/100EP52 is a differential data, differential clock D

Data enters the master portion of the flip−flop when the clock is

The EP52 employs input clamping circuitry so that under open input

The 100 Series contains temperature compensation.

330 ps Typical Propagation Delay

Maximum Frequency u 4 GHz Typical

PECL Mode: V

NECL Mode: V

Open Input Default State

Safety Clamp on Inputs

Q Output Will Default LOW with Inputs Open or at V

Semiconductor Components Industries, LLC, 2004

= 3.0 V to 5.5 V with V

= 0 V with V

) the outputs of the device will remain

= −3.0 V to −5.5 V

= 0 V

*For additional marking information, refer to

See detailed ordering and shipping information in the package

dimensions section on page 7 of this data sheet.

Application Note AND8002/D.

CASE 948R

DT SUFFIX

CASE 751

D SUFFIX

TSSOP−8

H = MC10

K = MC100

A = Assembly Location

SO−8

ORDERING INFORMATION

http://onsemi.com

MARKING DIAGRAMS*

HEP52

Publication Order Number:

ALYW

HP52

L = Wafer Lot

Y = Year

W = Work Week

MC10EP52/D

KEP52

ALYW

KP52

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