MC74VHCT259ADR2G ON Semiconductor, MC74VHCT259ADR2G Datasheet

MC74VHCT259ADR2G

Manufacturer Part Number

MC74VHCT259ADR2G

Description

IC LATCH ADDRESSABLE 8BIT 16SOIC

Manufacturer

ON Semiconductor

Series

74VHCTr

Datasheet

1.MC74VHCT259ADR2G.pdf (9 pages)

Specifications of MC74VHCT259ADR2G

Logic Type

D-Type, Addressable

Circuit

1:8

Output Type

Standard

Voltage - Supply

4.5 V ~ 5.5 V

Independent Circuits

Delay Time - Propagation

6ns

Current - Output High, Low

8mA, 8mA

Operating Temperature

-55°C ~ 125°C

Mounting Type

Surface Mount

Package / Case

16-SOIC (3.9mm Width)

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Other names

MC74VHCT259ADR2GOS

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Meier Automation Equipment Co., Limited

Part Number:

MC74VHCT259ADR2G

Manufacturer:

ON/安森美

Quantity:

20 000

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MC74VHCT259A

8−Bit Addressable

Latch/1−of−8 Decoder

CMOS Logic Level Shifter

with LSTTL−Compatible Inputs

silicon gate CMOS technology. It achieves high speed operation

similar to equivalent Bipolar Schottky TTL while maintaining CMOS

low power dissipation.

output which provides high noise immunity and stable output.

digital systems. The device has four modes of operation as shown in

the mode selection table. In the addressable latch mode, the signal on

Data In is written into the addressed latch. The addressed latch follows

the data input with all non−addressed latches remaining in their

previous states. In the memory mode, all latches remain in their

previous state and are unaffected by the Data or Address inputs. In the

one−of−eight decoding or demultiplexing mode, the addressed output

follows the state of Data In with all other outputs in the LOW state. In

the Reset mode, all outputs are LOW and unaffected by the address

and data inputs. When operating the VHCT259 as an addressable

latch, changing more than one bit of the address could impose a

transient wrong address. Therefore, this should only be done while in

the memory mode.

be used as a level converter for interfacing 3.3 V to 5.0 V because it

has full 5.0 V CMOS level output swings.

between 0 V and 5.5 V are applied, regardless of the supply voltage.

The output structures also provide protection when V

input and output structures help prevent device destruction caused by

supply voltage−input/output voltage mismatch, battery backup, hot

insertion, etc.

Features

•

*For additional information on our Pb−Free strategy and soldering details, please

January, 2006 − Rev. 4

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

The MC74VHCT259 is an 8−bit Addressable Latch fabricated with

The internal circuit is composed of three stages, including a buffer

The VHC259 is designed for general purpose storage applications in

The VHCT inputs are compatible with TTL levels. This device can

The VHCT259A input structures provide protection when voltages

High Speed: t

Low Power Dissipation: I

TTL−Compatible Inputs: V

Power Down Protection Provided on Inputs and Outputs

Pin and Function Compatible with Other Standard Logic Families

Latchup Performance Exceeds 300 mA

ESD Performance: HBM > 2000 V

Pb−Free Packages are Available*

= 7.6 ns (Typ) at V

= 2 mA (Max) at T

= 0.8 V; V

= 5.0 V

= 2.0 V

= 25°C

= 0 V. These

See detailed ordering and shipping information in the package

dimensions section on page 7 of this data sheet.

(Note: Microdot may be in either location)

WL, L

WW, W

G or G

ORDERING INFORMATION

http://onsemi.com

CASE 751B

CASE 948F

SOEIAJ−16

DT SUFFIX

TSSOP−16

M SUFFIX

CASE 966

D SUFFIX

SOIC−16

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

Publication Order Number:

MC74VHCT259A/D

DIAGRAMS

VHCT259AG

74VHCT259

MARKING

AWLYWW

ALYWG

VHCT

259A

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MC74VHCT259ADR2G Summary of contents

Page 1

... ESD Performance: HBM > 2000 V • Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 January, 2006 − Rev These ...

Page 2

A0 ADDRESS 2 A1 INPUTS DATA IN 15 RESET 14 ENABLE Figure 1. Logic Diagram BIN/OCT MODE SELECTION TABLE Enable Reset ...

Page 3

DATA INPUT ADDRESS A1 DECODER INPUTS A2 14 ENABLE 15 RESET Figure 4. Expanded Logic Diagram MC74VHCT259A http://onsemi.com ...

Page 4

MAXIMUM RATINGS Symbol V Positive DC Supply Voltage CC V Digital Input Voltage Output Voltage OUT I Input Diode Current IK I Output Diode Current Output Current, per Pin OUT I DC Supply Current, ...

Page 5

DC CHARACTERISTICS (Voltages Referenced to GND) Symbol Parameter V Minimum High−Level IH Input Voltage V Maximum Low−Level IL Input Voltage V Maximum High−Level V OH Output Voltage Maximum Low−Level V OL Output Voltage I ...

Page 6

TIMING REQUIREMENTS (Input Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...

Page 7

... ORDERING INFORMATION Device MC74VHCT259AD MC74VHCT259ADG MC74VHCT259ADR2 MC74VHCT259ADR2G MC74VHCT259ADT MC74VHCT259ADTG MC74VHCT259ADTR2 MC74VHCT259ADTRG MC74VHCT259AM MC74VHCT259AMG MC74VHCT259AMEL MC74VHCT259AMELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. ...

Page 8

G K −T− SEATING PLANE 0.25 (0.010 16X REF 0.10 (0.004) 0.15 (0.006 L PIN 1 IDENT. 1 0.15 (0.006 ...

Page 9

... F DETAIL E H DETAIL American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. ...

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