XR16L788IQF Exar Corporation, XR16L788IQF Datasheet

XR16L788IQF

Manufacturer Part Number

XR16L788IQF

Description

LQFP64

Manufacturer

Exar Corporation

Datasheet

1.XR16L788IQF.pdf (54 pages)

Specifications of XR16L788IQF

Date_code

07+

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OCTOBER 2005

GENERAL DESCRIPTION

The XR16L7881 (788), is a 2.97V to 5.5V with 5V

tolerant

Receiver and Transmitter (UART). The highly

integrated device is designed for high bandwidth

requirement in communication systems. The global

interrupt source register provides a complete interrupt

status indication for all 8 channels to speed up

interrupt parsing. Each UART has its own 16C550

compatible set of configuration registers, TX and RX

FIFOs of 64 bytes, fully programmable transmit and

receive FIFO trigger levels, TX and RX FIFO level

counters, automatic RTS/CTS or DTR/DSR hardware

flow control with programmable hysteresis, autoamtic

software (Xon/Xoff) flow control, RS-485 half-duplex

direction control with programmable turn-around

delay, Intel or Motorola bus interface and sleep mode

with a wake-up indicator.

APPLICATIONS

•

Exar

OTE

IGURE

Remote Access Servers

Ethernet Network to Serial Ports

Network Management

Factory Automation and Process Control

Point-of-Sale Systems

Multi-port RS-232/RS-422/RS-485 Cards

RST#

A7:A0

D7:D0

IOR#

IOW#

CS#

INT#

16/68#

Corporation 48720 Kato Road, Fremont CA, 94538

Covered by US patents #5,649,122 and #5,949,787

1. B

inputs

LOCK

Data Bus

Interface

octal

IAGRAM

Universal

Timer/Counter

Configuration

Registers

Asynchronous

Device

16-bit

HIGH PERFORMANCE 2.97V TO 5.5V OCTAL UART

•

(510) 668-7000

FEATURES

•

2.97V to 5.5V with 5V Tolerant Inputs Operation

Single Interrupt Output for all 8 UARTs

Global Interrupt Source for all 8 UARTs

5G “Flat” UART Registers for Configurations

Simultaneous UART Channels Initialization

Auto RS485 Half-duplex Control with Program-

mable Turn-around Delay

A General Purpose 16-bit Timer/Counter

Sleep Mode with Wake-up Indication

Highly Integrated Device for Space Saving

First eight registers are 16C550 compatible

64-byte Transmit and Receive FIFOs

Transmit and Receive FIFO Level Counters

Programmable TX and RX FIFO Trigger Levels

Automatic RTS/CTS or DTR/DSR Flow Control

Selectable Hardware Flow Control Hysteresis

Automatic Xon/Xoff Software Flow Control with

Status Indicator

Infrared (IrDA 1.0) Data Encoder/Decoder

Programmable Data Rate with Prescaler

Up to 6.25 Mbps Serial Data Rate at 5V

100-pin QFP Package (14x20x3 mm)

UART

Regs

BRG

UART Channel 1

UART Channel 2

UART Channel 3

UART Channel 4

UART Channel 5

UART Channel 0

UART Channel 6

UART Channel 7

Crystal Osc/Buffer

•

FAX (510) 668-7017

TX & RX

64 Byte RX FIFO

64 Byte TX FIFO

ENDEC

•

TX0, RX0, DTR0#,

DSR0#, RTS0#,

CTS0#, CD0#, RI0#

www.exar.com

TX7, RX7, DTR7#,

DSR7#, RTS7#,

CTS7#, CD7#, RI7#

XTAL1

XTAL2

TMRCK

REV. 1.2.2

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