HYS64D64320HU-5-C Infineon, HYS64D64320HU-5-C Datasheet
HYS64D64320HU-5-C
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HYS64D64320HU-5-C Summary of contents
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HYS64D[16/32/64][300/301/320][G/H]U–5–C HYS72D[32/64][300/301/320][G/H]U–5–C HYS64D[16/32/64][300/301/320][G/H]U–6–C HYS72D[32/64][300/301/320][G/H]U–6– ...
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... Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies failure of such components can reasonably be expected to cause the failure of that life-support device or system affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body support and/or maintain and sustain and/or protect human life ...
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HYS64D[16/32/64][300/301/320][G/H]U–5–C HYS72D[32/64][300/301/320][G/H]U–5–C HYS64D[16/32/64][300/301/320][G/H]U–6–C HYS72D[32/64][300/301/320][G/H]U–6– ...
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... Editorial change We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: techdoc.mp@infineon.com 2004-03 Template: mp_a4_v2.0_2003-06-06.fm ...
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... Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.1 Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.2 Current Conditions and Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4 SPD Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Data Sheet HYS[64/72]D[16/32/64][300/301/320][G/H]U[5/6]C Unbuffered DDR SDRAM Modules 5 Rev. 1.0, 2004-03 ...
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... DDR400 Speed Grade supported • Lead-free Table 1 Performance Part Number Speed Code Module Speed Grade Component Module max. Clock Frequency 1.2 Description The HYS64D[16/32/64][300/301/320][G/H]U–5–C, HYS72D[32/64][300/301/320][G/H]U–5–C, HYS64D[16/32/64][300/301/320][G/H]U–6–C and HYS72D[32/64][300/301/320][G/H]U–6–C are industry standard 184-Pin Unbuffered Double Data Rate SDRAM (UDIMM) organized as 16M ! 64, 32M ! 64 and 64M ! 64 for non-parity and 32M ! 72 and 64M ! 72 for ECC main memory applications ...
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... PC2700U–25330–C0 HYS64D32300HU–6–C PC2700U–25330–A0 HYS72D32300HU–6–C PC2700U–25330–A0 HYS64D64320HU–6–C PC2700U–25330–B0 HYS72D64320HU–6–C PC2700U–25330–B0 Note: All part numbers end with a place on request. Example: HYS72D32000HU- 6-C, indicating rev. C dies are used for SDRAM components. The Compliance Code is printed on the module labels desc latencies and SPD code definition (for example 20330 means CAS latency of 2 ...
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... SSTL Address Signal 12 I SSTL Note: Module based on 256 Mbit or larger dies NC — Note: 128 Mbit module Address Signal 13 I SSTL Note: 1 Gbit module NC — Note: Module based on 512 Mbit smaller dies Data Bus 63:0 I/O SSTL I/O SSTL I/O SSTL I/O SSTL I/O SSTL I/O SSTL I/O SSTL ...
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... Note: ECC type module — Note: Non-ECC module Check Bit 4 SSTL Note: ECC type module — Note: Non-ECC module Check Bit 5 SSTL Note: ECC type module — Note: Non-ECC module Check Bit 6 SSTL Note: ECC type module — Note: Non-ECC module Check Bit 7 SSTL Note: ECC type module — ...
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... Output. Digital levels. I/O I bidirectional input/output signal. AI Input. Analog levels. PWR Power 10 Pin Configuration Buffer Function Type Ground Plane Identification Note: Pin in tristate, indicating V DD and V nets DDQ connected on PCB Not connected — Pins not connected on Infineon UDIMMs Rev. 1.0, 2004-03 ...
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... Table 4 Abbreviations for Pin Type (cont’d) Abbreviatio Description n GND Ground NC Not Connected (JEDEC Standard) Data Sheet HYS[64/72]D[16/32/64][300/301/320][G/H]U[5/6]C Unbuffered DDR SDRAM Modules Table 5 Abbreviations for Buffer Type Abbreviatio Description n SSTL Serial Stub Terminalted Logic (SSTL2) LV-CMOS Low Voltage CMOS CMOS ...
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... SDRAMs # row/bank/ SDRAMs columns bits 16M ! 16 4 13/2/9 32M ! 8 8 13/2/10 32M ! 8 9 13/2/10 32M ! 8 16 13/2/10 32M ! 8 18 13/2/10 12 Unbuffered DDR SDRAM Modules Pin Configuration Pin 002 - DQ00 Pin 004 - DQ01 Pin 006 - DQ02 Pin 008 - DQ03 Pin 010 - NC Pin 012 - DQ08 Pin 014 ...
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... DM2 UDM DQS2 UDQS DQ16 I/O8 DQ17 I/O9 DQ18 I/O10 DQ19 I/O11 DQ20 I/O12 DQ21 I/O13 DQ22 I/O14 DQ23 I/O15 $ " " Unbuffered DDR SDRAM Modules Pin Configuration D1 DM5 LDM CS DQS5 LDQS DQ40 I/O 0 DQ41 I/O 1 DQ42 I/O 2 DQ43 I/O 3 DQ44 I/O 4 DQ45 I/O 5 DQ46 I/O 6 DQ47 I/O 7 DM4 UDM ...
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... SAD SA0 A0 SA1 A1 SA2 Table 9 Clock Input $ " " CK0, CK0 CK1, CK1 CK2, CK2 15 Unbuffered DDR SDRAM Modules Pin Configuration V : SPD EEPROM SDRAMs DDQ V : SDRAMs REF V : SDRAMs Strap: see Note 1 D3 DM6 ...
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... I/O 6 DQ62 I/O 7 DQ63 SCL SAD SA0 SA1 SA2 Table 10 Clock Input $ " " CK0, CK0 CK1, CK1 CK2, CK2 16 Unbuffered DDR SDRAM Modules Pin Configuration V : SPD EEPROM SDRAMs D0 - D15 DD DDQ V : SDRAMs D0 - D15 REF V : SDRAMs D0 - D15 SS Strap: see Note ...
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... DM7/DQS16 DM DQS I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 DM8/DQS17 : SDRAMs D0 - D17 Table 11 Clock Input $ " " CK0, CK0 CK1, CK1 CK2, CK2 17 Unbuffered DDR SDRAM Modules Pin Configuration SCL SCL SAD SAD SA0 A0 SA1 A1 SA2 DQS4 DQS DQS DQ32 ...
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... DDQ DDQ DDQ DDQ – – 0.04 REF 0.15 REF V –0.3 V –0.3 V 0.36 18 Unbuffered DDR SDRAM Modules Electrical Characteristics Values Unit Note/ Test Typ. Max. V – +0.5 V DDQ – +3.6 V – +3.6 V – +3.6 V – + – +150 % C 1 – – ...
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... REF (DC) REF system supply for signal termination resistors, is expected to be set equal REF V stabilizes. REF 19 Unbuffered DDR SDRAM Modules Electrical Characteristics Unit Note/Test Condition 7) — #A Any input 0 V & All other pins not under test 8) DQs are disabled; ...
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... IH,MIN IN REF & . IH,MIN IL,MAX for DQ, DQS and DM. ILMAX IN REF IH,MIN RC RAS,MAX OUT 20 Unbuffered DDR SDRAM Modules Electrical Characteristics V = for DQ, DQS and DM. REF Rev. 1.0, 2004-03 Symbol I DD0 I DD1 I DD2P I DD2F I DD2Q I DD3P I DD3N I DD4R I DD4W I DD5 I DD6 I ...
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... 2 ° values of the component data sheet as follows: DDx [component] with m and n number of components of rank 1 and 2; n=0 for 1 rank modules data sheet values as DDx 21 Unbuffered DDR SDRAM Modules Electrical Characteristics Unit 512MB ! 72 2 Ranks 5 Max ...
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... I and can be measured differently according to DQ loading 2 ° values of the component data sheet as follows: DDx [component] with m and n number of components of rank 1 and 2; n=0 for 1 rank modules data sheet values as DDx Symbol 6 DDR333 Min. Max. t –0.7 +0 –0.6 +0 ...
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... Write preamble setup time Write postamble Write preamble Address and control input setup time Address and control input hold time Read preamble Read postamble Active to Precharge command Data Sheet HYS[64/72]D[16/32/64][300/301/320][G/H]U[5/6]C Unbuffered DDR SDRAM Modules Symbol 6 5 DDR333 DDR400B Min. Max. Min ...
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... XSNR t 200 — XSRD t — 7.8 REFI V = +2.5 V " 0.2 V (DDR333 CK/CK slew rate are ' 1.0 V/ns. REF V stabilizes. REF . IL(ac) 24 Unbuffered DDR SDRAM Modules Electrical Characteristics 5 Unit Note/ Test DDR400B Min. Max. 55 — — — — RCD RASmin 10 — ...
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... CS Latency 20 Write Latency 21 DIMM Attributes 22 Component Attributes 23 tCK @ CLmax -0.5 (Byte 18) [ns] 24 tAC SDRAM @ CLmax -0.5 [ns] 25 tCK @ CLmax -1 (Byte 18) [ns] Data Sheet HYS[64/72]D[16/32/64][300/301/320][G/H]U[5/6]C Unbuffered DDR SDRAM Modules 128 MB 256 MB 512 Rank 1 Rank 2 Ranks PC3200U PC3200U PC3200U 30330 30330 30330 Rev 0 ...
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... DIMM PCB Height not used 62 SPD Revision 63 Checksum of Byte 0-62 64 JEDEC ID Code of Infineon (1) 65 JEDEC ID Code of Infineon ( Module Manufacturer Location 73 Part Number, Char 1 74 Part Number, Char 2 75 Part Number, Char 3 76 Part Number, Char 4 Data Sheet HYS[64/72]D[16/32/64][300/301/320][G/H]U[5/6]C ...
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... Part Number, Char 17 90 Part Number, Char 18 91 Module Revision Code 92 Test Program Revision Code 93 Module Manufacturing Date Year 94 Module Manufacturing Date Week Module Serial Number ( 127 Blank Data Sheet HYS[64/72]D[16/32/64][300/301/320][G/H]U[5/6]C Unbuffered DDR SDRAM Modules 128 MB 256 MB 512 Rank ...
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... DIMM Attributes 22 Component Attributes 23 tCK @ CLmax -0.5 (Byte 18) [ns] 24 tAC SDRAM @ CLmax -0.5 [ns] 25 tCK @ CLmax -1 (Byte 18) [ns] 26 tAC SDRAM @ CLmax -1 [ns] Data Sheet HYS[64/72]D[16/32/64][300/301/320][G/H]U[5/6]C Unbuffered DDR SDRAM Modules 128 MB 256 MB 512 Rank 1 Rank 2 Ranks PC3200U PC3200U PC3200U 30330 30330 30330 Rev 0 ...
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... DIMM PCB Height not used 62 SPD Revision 63 Checksum of Byte 0-62 64 JEDEC ID Code of Infineon ( JEDEC ID Code of Infineon ( Module Manufacturer Location 73 Part Number, Char 1 74 Part Number, Char 2 75 Part Number, Char 3 76 Part Number, Char 4 77 Part Number, Char 5 ...
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... Part Number, Char 17 90 Part Number, Char 18 91 Module Revision Code 92 Test Program Revision Code 93 Module Manufacturing Date Year 94 Module Manufacturing Date Week Module Serial Number ( 127 Blank Data Sheet HYS[64/72]D[16/32/64][300/301/320][G/H]U[5/6]C Unbuffered DDR SDRAM Modules 128 MB 256 MB 512 Rank ...
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... DIMM Attributes 22 Component Attributes 23 tCK @ CLmax -0.5 (Byte 18) [ns] 24 tAC SDRAM @ CLmax -0.5 [ns] 25 tCK @ CLmax -1 (Byte 18) [ns] 26 tAC SDRAM @ CLmax -1 [ns] Data Sheet HYS[64/72]D[16/32/64][300/301/320][G/H]U[5/6]C Unbuffered DDR SDRAM Modules 128 MB 256 MB 512 Rank 1 Rank 2 Ranks PC2700U PC2700U PC2700U 25330 25330 25330 Rev 0 ...
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... DIMM PCB Height not used 62 SPD Revision 63 Checksum of Byte 0-62 64 JEDEC ID Code of Infineon ( JEDEC ID Code of Infineon ( Module Manufacturer Location 73 Part Number, Char 1 74 Part Number, Char 2 75 Part Number, Char 3 76 Part Number, Char 4 77 Part Number, Char 5 ...
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... Part Number, Char 17 90 Part Number, Char 18 91 Module Revision Code 92 Test Program Revision Code 93 Module Manufacturing Date Year 94 Module Manufacturing Date Week Module Serial Number ( -127 Blank Data Sheet HYS[64/72]D[16/32/64][300/301/320][G/H]U[5/6]C Unbuffered DDR SDRAM Modules 128 MB 256 MB 512 ...
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... DIMM Attributes 22 Component Attributes 23 tCK @ CLmax -0.5 (Byte 18) [ns] 24 tAC SDRAM @ CLmax -0.5 [ns] 25 tCK @ CLmax -1 (Byte 18) [ns] 26 tAC SDRAM @ CLmax -1 [ns] Data Sheet HYS[64/72]D[16/32/64][300/301/320][G/H]U[5/6]C Unbuffered DDR SDRAM Modules 128 MB 256 MB 512 Rank 1 Rank 2 Ranks PC2700U PC2700U PC2700U 25330 25330 25330 Rev 0 ...
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... DIMM PCB Height not used 62 SPD Revision 63 Checksum of Byte 0-62 64 JEDEC ID Code of Infineon ( JEDEC ID Code of Infineon ( Module Manufacturer Location 73 Part Number, Char 1 74 Part Number, Char 2 75 Part Number, Char 3 76 Part Number, Char 4 77 Part Number, Char 5 ...
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... Part Number, Char 17 90 Part Number, Char 18 91 Module Revision Code 92 Test Program Revision Code 93 Module Manufacturing Date Year 94 Module Manufacturing Date Week Module Serial Number ( -127 Blank Data Sheet HYS[64/72]D[16/32/64][300/301/320][G/H]U[5/6]C Unbuffered DDR SDRAM Modules 128 MB 256 MB 512 ...
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... Package Outlines 1 2.36 ±0.1 ø0 64. MIN. Detail of contacts 1.27 1 ±0. ECC modules only Burr max. 0.4 allowed Figure 7 Package Outlines - Raw Card C 128 MByte, 1 Rank Module Data Sheet HYS[64/72]D[16/32/64][300/301/320][G/H]U[5/6]C 133.35 128. 6.62 C 2.175 6. 1.27 = 120.65 1.8 ±0.1 0.1 0 Unbuffered DDR SDRAM Modules ...
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... A B 64. MIN. Detail of contacts 1.27 1 ±0.05 Burr max. 0.4 allowed Figure 8 Package Outline - Raw Card A 256 MByte, 1 Rank Module Data Sheet HYS[64/72]D[16/32/64][300/301/320][G/H]U[5/6]C 133.35 128.95 A 6.62 C 2.175 6. 1.27 = 120.65 1.8 ±0.1 0.1 0 Unbuffered DDR SDRAM Modules Package Outlines 92 92 ...
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... A B 64. MIN. Detail of contacts 1.27 1 ±0. ECC modules only Burr max. 0.4 allowed Figure 9 Package Outline - Raw Card A 256 MByte, 1 Rank ECC Module Data Sheet HYS[64/72]D[16/32/64][300/301/320][G/H]U[5/6]C 133.35 128. 6.62 C 2.175 6. 1.27 = 120.65 1.8 ±0.1 0 Unbuffered DDR SDRAM Modules ...
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... A B 64. MIN. Detail of contacts 1.27 1 ±0.05 Burr max. 0.4 allowed Figure 10 Package Outline - Raw Card B 512 MByte, 2 Ranks Module Data Sheet HYS[64/72]D[16/32/64][300/301/320][G/H]U[5/6]C 133.35 128.95 A 6.62 C 2.175 6. 1.27 = 120.65 1.8 ±0.1 0 Unbuffered DDR SDRAM Modules Package Outlines 0.4 49. 184 Rev ...
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... A B 64. MIN. Detail of contacts 1.27 1 ±0. ECC modules only Burr max. 0.4 allowed Figure 11 Package Outline - Raw Card B 512 MByte, 2 Ranks ECC Module Data Sheet HYS[64/72]D[16/32/64][300/301/320][G/H]U[5/6]C 133.35 128. 6.62 C 2.175 6. 1.27 = 120.65 1.8 ±0.1 0 Unbuffered DDR SDRAM Modules ...
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... Published by Infineon Technologies AG ...