HCS163DMSR Intersil Corporation, HCS163DMSR Datasheet
HCS163DMSR
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HCS163DMSR Summary of contents
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... CMOS/SOS Logic Family. The HCS163MS is supplied lead Ceramic flatpack (K suffi SBDIP Package (D suffix). Ordering Information PART NUMBER TEMPERATURE RANGE HCS163DMSR HCS163KMSR HCS163D/Sample HCS163K/Sample HCS163HMSR CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. ...
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Functional Block Diagram SPE 1 MR VCC 2 CP OPERATING MODE MR Reset (clear) l Parallel Load h (Note 3) h (Note 3) Count h (Note 3) Inhibit h (Note 3) h (Note 3) ...
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Absolute Maximum Ratings Supply Voltage (VCC -0.5V to +7.0V Input Voltage Range, All Inputs . . ...
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TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL Propagation Delay TPHL, VCC = 4. TPLH Propagation Delay TPHL, VCC = 4. TPLH Propagation Delay TPHL, VCC = 4. TPLH NOTES: 1. ...
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TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL Supply Current ICC Output Current (Sink) IOL Output Current IOH (Source) Output Voltage Low VOL Output Voltage High VOH Input Leakage Current IIN Noise Immunity FN Functional Test Propagation Delay ...
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CONFORMANCE GROUPS Initial Test (Preburn-In) Interim Test I (Postburn-In) Interim Test II (Postburn-In) PDA Interim Test III (Postburn-In) PDA Final Test Group A (Note 1) Group B Subgroup B-5 Subgroup B-6 Group D NOTE: 1. Alternate group A testing in ...
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Intersil Space Level Product Flow - ‘MS’ Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) GAMMA Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Nondestructive Bond Pull, Method 2023 Sample - Wire Bond Pull Monitor, Method ...
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Propagation Delay Timing Diagram and Load Circuit VIH INPUT VS VIL TPLH VOH VS OUTPUT VOL AC VOLTAGE LEVELS PARAMETER HCS VCC 4.50 VIH 4.50 VS 2.25 VIL 0 GND 0 DUT 50pF RL = 500 ...
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... All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...