TC94A04AFD Toshiba Semiconductor, TC94A04AFD Datasheet - Page 11

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TC94A04AFD

Manufacturer Part Number
TC94A04AFD
Description
1 CHIP AUDIO DIGITAL PROCESSOR
Manufacturer
Toshiba Semiconductor
Datasheet

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The IFDI signal is the data.
sent after that are fixed to two bytes. Both command and data are sent starting from the MSB in I
format.
the SYNC signal, such as the RUN command (command-44h) or the IFF flag (command-4Ah), must be
synchronized with the SYNC signal and loaded on that signal.
When I2CS = “H”, data can be transmitted or received in I
When the CS signal is Low, control from the microcontroller is enabled.
In I
The TC94A04AF/AFD loads the IFDI data on the IFCK signal rising edge.
When CS = “H”, IFCK and IFD signal are don't care.
The registers are set by command data using the IFDI signal.
The first byte after the I
The data loaded internally every two bytes. Note that commands or data that must be switched on
2
C mode, the CS signal can be used fixed to “L”. The IFCK signal is the transmit/receive clock.
2
C address (= 32h) is a command, which differs for each register. The data
2
C bus mode.
2
C

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