ML4827 Fairchild, ML4827 Datasheet - Page 12

• Manufacturer Part Number: ML4827
• Description: Fault-Protected PFC and PWM Controller Combo
• Manufacturer: Fairchild

ML4827
Using the recommended values of δ
64% for a high-δ application, a MOSFET switch with a
Drain-Source breakdown voltage of 900V, or in some cases
as low as 800V, can reliably be used. Such parts are readily
and inexpensively available from a number of vendors.
V
The V
and inhibits the PWM if this voltage on V
nominal 2.5V. Once this voltage reaches 2.5V, which corre-
sponds to the PFC output capacitor being charged to its rated
boost voltage, the soft-start begins.
PWM Control (RAMP 2)
When the PWM section is used in current mode, RAMP 2 is
generally used as the sampling point for a voltage represent-
ing the current in the primary of the PWM’s output trans-
former, derived either by a current sensing resistor or a
current transformer. In voltage mode, it is the input for a
ramp voltage generated by a second set of timing compo-
nents (R
of zero volts and should have a peak value of approximately
5V. In voltage mode operation, feedforward from the PFC
output buss is an excellent way to derive the timing ramp for
the PWM stage.
Soft Start
Start-up of the PWM is controlled by the selection of the
external capacitor at SS. A current source of 50µA supplies
the charging current for the capacitor, and start-up of the
PWM begins at 1.25V. Start-up delay can be programmed by
the following equation:
where C
the desired start-up delay.
It is important that the time constant of the PWM soft-start
allow the PFC time to generate sufficient output power for the
12
IN
OK Comparator
IN
RAMP2
SS
OK comparator monitors the DC output of the PFC
is the required soft start capacitance, and t
, C
RAMP2
C
SS
), which will have a minimum value
=
t
DELAY
×
--------------- -
1.25V
50µA
MIN
Figure 4. External Component Connections to V
= 60% and δ
FB
is less than its
ML4827
V BIAS
V CC
GND
DELAY
R BIAS
MAX
=
(6)
is
CERAMIC
10nF
PWM section. The PWM start-up delay should be at least 5ms.
Solving for the minimum value of C
Generating V
The ML4827 is a current-fed part. It has an internal shunt
voltage regulator, which is designed to regulate the voltage
internal to the part at 13.5V. This allows a low power dissipa-
tion while at the same time delivering 10V of gate drive at
the PWM OUT and PFC OUT outputs. It is important to
limit the current through the part to avoid overheating or
destroying it. This can be easily done with a single resistor in
series with the V
18V to 20V. The resistor’s value must be chosen to meet the
operating current requirement of the ML4827 itself (19mA
max) plus the current required by the two gate driver outputs.
EXAMPLE:
With a V
ML4827 driving a total gate charge of 110nC at 100kHz
(e.g., 1 IRF840 MOSFET and 2 IRF830 MOSFETs), the
gate driver current required is:
To check the maximum dissipation in the ML4827, find the
current at the minimum V
The maximum allowable I
able design.
CERAMIC
BIAS
I
I
R
1µF
CC
GATEDRIVE
BIAS
=
of 20V, a V
C
20V 12.4V
-------------------------------- -
CC
=
CC
SS
-------------------------------------- -
19mA
pin, returned to a bias supply of typically
180Ω
20V 14.6V
=
–
CC
=
5ms
100kHz
–
CC
+
CC
CC
11mA
×
(12.4V):
limit of 14.6V (max) and the
is 55mA, so this is an accept-
--------------- -
1.25V
=
50µA
42.2mA
×
100nC
PRODUCT SPECIFICATION
=
SS
≅
180Ω
:
220nF
REV. 1.0.1 6/27/01
=
11mA
(7)
(8)
(9)