HC4094 System Logic Semiconductor, HC4094 Datasheet

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HC4094

Manufacturer Part Number
HC4094
Description
8-Bit Serial-Input Shift Register With Latched 3-State Outputs(High-Performance Silicon-Gate CMOS)
Manufacturer
System Logic Semiconductor
Datasheet

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8-Bit Serial-Input Shift Register With Latched
3-State Outputs
High-Performance Silicon-Gate CMOS
device inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
with three-state parallel outputs. Data is shifted serially through the
shift register on the positive going transition of the clock input signal.
The output of the last stage SQ
devices.
the following negative transition of the clock input signal. The data of
each stage of the shift register is provided with a latch, which latches
data on the negative going transition of the Strobe input signal. When
the Strobe input is held high, data propagates through the latch to a 3-
state output buffer.
SLS
The SL74HC4094 is identical in pinout to the LS/ALS4094. The
This device consists of an 8-bit shift register and 8-bit D-type latch
Data on the SQ
This buffer is enabled when Output Enable input is taken high.
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 A
High Noise Immunity Characteristic of CMOS Devices
System Logic
Semiconductor
LOGIC DIAGRAM
H
output is transferred to a second output (SQ
PIN 8 = GND
PIN 16 =V
CC
H
can be used to cascade several
NC = No Change
Z = high impedance
X = don’t care
Clock Output
H
’) on
Enable
H
H
H
H
L
L
Inputs
T
A
ORDERING INFORMATION
FUNCTION TABLE
= -55 to 125 C for all packages
Strobe A
X
X
H
H
X
PIN ASSIGNMENT
L
SL74HC4094N Plastic
SL74HC4094D SOIC
SL74HC4094
X
X
X NC
H
X NC
L
Q
Z
Z
H
L
Outputs
Parallel
A
Q
Q
NC
NC
Q
Z
Z
N-1
N-1
N
SQ
NC SQ
NC SQ
Q6 NC
Q6 NC
Q6 NC
Q6 NC
Outputs
Serial
H
SQ
H
H
H

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HC4094 Summary of contents

Page 1

... Serial-Input Shift Register With Latched 3-State Outputs High-Performance Silicon-Gate CMOS The SL74HC4094 is identical in pinout to the LS/ALS4094. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. This device consists of an 8-bit shift register and 8-bit D-type latch with three-state parallel outputs ...

Page 2

... SL74HC4094 * MAXIMUM RATINGS Symbol V DC Supply Voltage (Referenced to GND Input Voltage (Referenced to GND Output Voltage (Referenced to GND) OUT I DC Input Current, per Pin Output Current, per Pin OUT I DC Supply Current Power Dissipation in Still Air, Plastic DIP+ ...

Page 3

... V 2 4.5 OUT 6 4.0 mA 4.5 OUT I 5.2 mA 6.0 OUT GND 6 Output in High-Impedance 6.0 State GND OUT GND 6 OUT SL74HC4094 Guaranteed Limit 125 Unit -55 C 1.5 1.5 1.5 V 3.15 3.15 3.15 4.2 4.2 4.2 0.5 0.5 0.5 V 1.35 1.35 1.35 1.8 1.8 1.8 1.9 1.9 1.9 V 4.4 4.4 4.4 5.9 5.9 5.9 3.98 3.84 3.7 5.48 5.34 5.2 0.1 0.1 0.1 V 0.1 0.1 0.1 ...

Page 4

... SL74HC4094 AC ELECTRICAL CHARACTERISTICS Symbol Parameter f Maximum Clock Frequency (50% Duty Cycle) max (Figures 1 and Maximum Propagation Delay, Clock to SQ PLH PHL (Figures 1 and Maximum Propagation Delay, Clock to Q PLH PHL (Figures 2 and Maximum Propagation Delay ,Output Enable to PLZ PHZ ...

Page 5

... Figure 1. Switching Waveforms Figure 3. Switching Waveforms Figure 5. Test Circuit System Logic SLS Semiconductor SL74HC4094 Figure 2. Switching Waveforms Figure 4. Switching Waveforms Figure 6. Test Circuit ...

Page 6

... SL74HC4094 EXPANDED LOGIC DIAGRAM System Logic SLS Semiconductor ...

Page 7

... System Logic SLS Semiconductor TIMING DIAGRAM SL74HC4094 ...

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