LP2975AIMM-12 National Semiconductor, LP2975AIMM-12 Datasheet - Page 15

• Manufacturer Part Number: LP2975AIMM-12
• Description: MOSFET LDO Driver/Controller
• Manufacturer: National Semiconductor

Application Hints
that when the total phase shift at 0 dB reaches (or gets close
to) −180˚, oscillations will result. Therefore, it can be seen
that at least two poles in the gain curve are required to
cause instability.
ZERO: A zero has an effect that is exactly opposite to a pole .
A zero will add a maximum +90˚ of phase lead (defined as
positive phase shift). Also, a zero causes the slope of the
gain curve to increase by an additional +20 dB/decade (see
graph EFFECTS OF A SINGLE ZERO ).
TOTAL PHASE SHIFT: The actual test of whether or not a
regulator is stable is the amount of phase shift that is present
when the gain curve crosses the 0 dB axis (the frequency
where this occurs was previously defined as f
The phase shift at f
poles and zeroes on the Bode plot and adding up the contri-
butions of phase lag and lead from each one. As shown in
the graphs, most of the phase lag (or lead) contributed by a
pole (or zero) occurs within one decade of the frequency of
the pole (or zero).
In general, a phase margin (defined as the difference be-
tween the total phase shift and −180˚) of at least 20˚ to 30˚
is required for a stable loop.
Effects of a Single Pole
Effects of a Single Zero
c
can be estimated by looking at all of the
(Continued)
DS100034-25
DS100034-26
c
).
15
STABILITY ANALYSIS OF TYPICAL APPLICATIONS
The first application to be analyzed is a fixed-output voltage
regulator with no feed-forward capacitor (see graph STABLE
PLOT WITHOUT FEED-FORWARD ).
In this example, the value of C
pole formed by C
at 200 Hz. The ESR of C
by the ESR and C
selections follow the general guidelines stated previously in
this document). Note that the gate capacitance is assumed
to be moderate, with the pole formed by the C
as f
To estimate the total phase margin, the individual phase shift
contributions of each pole and zero will be calculated assum-
ing f
Controller pole shift = −90˚
f
f
f
Summing the four numbers, the estimate for the total phase
shift is −122˚, which corresponds to a phase margin of 58˚.
This application is stable, but could be improved by using a
feed-forward capacitor (see next section).
EFFECT OF FEED-FORWARD: The example previously
used will be continued with the addition of a feed-forward ca-
pacitor C
FEED-FORWARD ). The zero formed by C
fined as f
viously defined as f
corresponds to V
p
z
pg
shift = −arctan (10k/200) = −89˚
shift = arctan (10k/5k) = +63˚
shift = −arctan (10k/100k) = −6˚
pg
p
) occurring at 100 kHz.
= 200 Hz, f
F
zf
) is set at 10 kHz and the pole formed by C
(see graph IMPROVED PHASE MARGIN WITH
Stable Plot without Feed-Forward
OUT
OUT
z
OUT
= 5 kHz, f
pf
and R
) is set at 40 kHz (the 4X ratio of f
= 5V).
(defined as f
OUT
L
(previously defined as f
is selected so that zero formed
c
= 10 kHz and f
OUT
z
) is set at 5 kHz (these
is selected so that the
DS100034-27
F
(previously de-
pg
GATE
www.national.com
= 100 kHz:
(defined
p
) is set
F
(pre-
pf
/f
zf