74LCX240 Fairchild Semiconductor, 74LCX240 Datasheet

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74LCX240

Manufacturer Part Number
74LCX240
Description
Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Manufacturer
Fairchild Semiconductor
Datasheet

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© 1999 Fairchild Semiconductor Corporation
74LCX240WM
74LCX240SJ
74LCX240MSA
74LCX240MTC
74LCX240
Low Voltage Octal Buffer/Line Driver with
5V Tolerant Inputs and Outputs
General Description
The LCX240 is an inverting octal buffer and line driver
designed to be employed as a memory address driver,
clock driver and bus oriented transmitter or receiver. The
device is designed for low voltage (2.5V or 3.3V) V
cations with capability of interfacing to a 5V signal environ-
ment.
The LCX240 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Order Number
Package Number
MSA20
MTC20
M20B
M20D
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
DS011993.prf
CC
appli-
Features
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to V
resistor is determined by the current-sourcing capability of the driver.
Connection Diagram
5V tolerant inputs and outputs
2.3V–3.6V V
6.5 ns t
Power-down high impedance inputs and outputs
Supports live insertion/withdrawal (Note 1)
Implements patented noise/EMI reduction circuitry
Latch-up performance exceeds 500 mA
ESD performance:
24 mA output drive (V
Human body model
Machine model
Package Description
PD
max (V
CC
CC
through a pull-up resistor: the minimum value or the
specifications provided
CC
200V
3.3V), 10 A I
CC
2000V
3.0V)
February 1994
Revised April 1999
CC
www.fairchildsemi.com
max

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74LCX240 Summary of contents

Page 1

... MSA20 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 74LCX240MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...

Page 2

Pin Descriptions Pin Names – – Truth Tables HIGH Voltage Level L LOW Voltage Level X Immaterial Z ...

Page 3

Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Source/Sink Current Supply ...

Page 4

AC Electrical Characteristics Symbol Parameter t Propagation Delay PHL t PLH t Output Enable Time PZL t PZH t Output Disable Time PLZ t PHZ t Output to Output Skew (Note 6) OSHL t OSLH Note 6: Skew is defined ...

Page 5

AC Loading and Waveforms (C L Test t PLH t PZL t PZH Waveform for Inverting and Non-Inverting Functions Propagation Delay, Pulse Width and t rec 3-STATE Output High Enable and Disable TImes for Logic (Input Pulse Characteristics; f=1MHz, t ...

Page 6

Schematic Diagram Generic for LCX Family www.fairchildsemi.com 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20B Package Number M20D 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number MSA20 8 ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE ...

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