GAL22V10B-15LJ LATTICE [Lattice Semiconductor], GAL22V10B-15LJ Datasheet - Page 10

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GAL22V10B-15LJ

Manufacturer Part Number
GAL22V10B-15LJ
Description
High Performance E2CMOS PLD Generic Array Logic
Manufacturer
LATTICE [Lattice Semiconductor]
Datasheet

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1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Description section.
3) Refer to fmax Description section. Characterized initially and after any design or process changes that may affect these
*Characterized but not 100% tested.
AC Switching Characteristics
PARAM
Capacitance (T
f
t
max
t
t
t
t
t
t
t
t
t
t
t
arw
t
spr
parameters.
wh
dis
arr
pd
co
cf
su
en
wl
ar
SYMBOL
h
2
3
C
C
I/O
I
COND.
TEST
C
A
A
A
A
A
B
A
1
Input or I/O to Combinatorial Output
Clock to Output Delay
Clock to Feedback Delay
Setup Time, Input or Fdbk before Clk
Hold Time, Input or Fdbk after Clk
Maximum Clock Frequency with
External Feedback, 1/(tsu + tco)
Maximum Clock Frequency with
Internal Feedback, 1/(tsu + tcf)
Maximum Clock Frequency with
No Feedback
Clock Pulse Duration, High
Clock Pulse Duration, Low
Input or I/O to Output Enabled
Input or I/O to Output Disabled
Input or I/O to Asynch. Reset of Reg.
Asynch. Reset Pulse Duration
Asynch. Reset to Clk Recovery Time
Synch. Preset to Clk Recovery Time
DESCRIPTION
A
= 25 C, f = 1.0 MHz)
Input Capacitance
I/O Capacitance
PARAMETER
Over Recommended Operating Conditions
MAXIMUM*
142.8
MIN. MAX.
166
200
2.5
2.5
5.5
1
1
3
0
1
1
1
4
4
COM
8
8
-5
10
5.5
5
4
3
6
6
-7 (PLCC)
MIN. MAX.
133
166
111
4.5
COM/IND
1
1
0
3
3
1
1
1
7
5
5
Specifications GAL22V10C
Specifications GAL22V10
UNITS
7.5
4.5
7.5
7.5
— 142.8
3
9
pF
pF
MIN. MAX.
105
125
-7 (PDIP)
3.5
3.5
COM/IND
1
1
5
0
1
1
1
7
5
5
7.5
4.5
7.5
7.5
3
9
71.4
MIN. MAX.
105
105
10
3
2
7
0
4
4
3
3
3
8
8
V
COM
TEST CONDITIONS
V
-10
CC
CC
= 5.0V, V
2.5
10
10
13
= 5.0V, V
7
9
71.4
MIN. MAX.
105
105
10
1
1
7
0
4
4
1
1
1
8
8
I/O
IND
-10
I
= 2.0V
= 2.0V
2.5
10
10
13
7
9
UNITS
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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