ADUM5401_VB AD [Analog Devices], ADUM5401_VB Datasheet - Page 21

• Manufacturer Part Number: ADUM5401_VB
• Description: Quad-Channel, 2.5 kV Isolators with Integrated DC-to-DC Converter
• Manufacturer: AD [Analog Devices]

Data Sheet
PROPAGATION DELAY-RELATED PARAMETERS
Propagation delay is a parameter that describes the time it takes
a logic signal to propagate through a component (see Figure 26).
The propagation delay to a logic low output may differ from the
propagation delay to a logic high.
Pulse width distortion is the maximum difference between these
two propagation delay values and is an indication of how
accurately the input signal timing is preserved.
Channel-to-channel matching refers to the maximum amount
the propagation delay differs between channels within a single
ADuM5401/ADuM5402/ADuM5403/ADuM5404
Propagation delay skew refers to the maximum amount the
propagation delay differs between multiple ADuM5401/
ADuM5402/ADuM5403/ADuM5404
under the same conditions.
START-UP BEHAVIOR
The
contain a soft start circuit. Therefore, the start-up current and
voltage behavior must be taken into account when designing
with this device.
When power is applied to V
to operate and draw current when the UVLO minimum voltage
is reached. The switching circuit drives the maximum available
power to the output until it reaches the regulation voltage where
PWM control begins. The amount of current and the time
required to reach regulation voltage depends on the load and
the V
With a fast V
up to 100 mA/V of V
the output can turn on, so the peak current is proportional to
the maximum input voltage.
With a slow V
voltage is not changing quickly when V
minimum voltage. The current surge is approximately 300 mA
because V
behavior during startup is similar to when the device load is a
short circuit; these values are consistent with the short-circuit
current shown in Figure 14.
When starting the device for V
the current available to the V
The
may not be able to drive the output to the regulation point if a
current-limiting device clamps the V
INPUT (V
OUTPUT (V
ADuM5401/ADuM5402/ADuM5403/ADuM5404
ADuM5401/ADuM5402/ADuM5403/ADuM5404
DD1
Ix
)
slew rate.
Ox
DD1
)
DD1
is nearly constant at the 2.7 V UVLO voltage. The
DD1
Figure 26. Propagation Delay Parameters
slew rate (200 μs or less), the peak current draws
slew rate (in the millisecond range), the input
DD1
t
PLH
. The input voltage goes high faster than
DD1
DD1
, the input switching circuit begins
ISO
power pin to less than 300 mA.
t
= 5 V operation, do not limit
PHL
DD1
components operating
DD1
voltage during startup.
reaches the UVLO
50%
50%
component.
do not
devices
Rev. B | Page 21 of 28
ADuM5401/ADuM5402/ADuM5403/ADuM5404
As a result, the
devices can draw large amounts of current at low voltage for
extended periods of time.
The output voltage of the ADuM5401/ADuM5402/ADuM5403/
ADuM5404
this overshoot could potentially damage components attached to
V
clamp the voltage. Typical behavior is shown in Figure 19 and
Figure 20.
EMI CONSIDERATIONS
The dc-to-dc converter section of the ADuM5401/ADuM5402/
ADuM5403/ADuM5404
allow efficient power transfer through the small transformers.
This creates high frequency currents that can propagate in circuit
board ground and power planes, causing edge emissions and
dipole radiation between the primary and secondary ground
planes. Grounded enclosures are recommended for applications
that use these devices. If grounded enclosures are not possible,
follow good RF design practices in the layout of the PCB. See the
AN-0971 Application Note
DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY
Positive and negative logic transitions at the isolator input cause
narrow (~1 ns) pulses to be sent to the decoder via the transformer.
The decoder is bistable and is, therefore, either set or reset by the
pulses, indicating input logic transitions. In the absence of logic
transitions at the input for more than 1 μs, a periodic set of refresh
pulses indicative of the correct input state is sent to ensure dc
correctness at the output. If the decoder receives no internal pulses
for more than approximately 5 μs, the input side is assumed to be
unpowered or nonfunctional, and the isolator output is forced to a
default low state by the watchdog timer circuit. This situation should
occur in the
during power-up and power-down operations.
The limitation on the magnetic field immunity of the ADuM5401/
ADuM5402/ADuM5403/ADuM5404
which induced voltage in the receiving coil of the transformer is
sufficiently large to either falsely set or reset the decoder. The
following analysis defines the conditions under which this may
occur. The 3.3 V operating condition of the ADuM5401/
ADuM5402/ADuM5403/ADuM5404
represents the most susceptible mode of operation.
The pulses at the transformer output have an amplitude greater
than 1.0 V. The decoder has a sensing threshold at approximately
0.5 V, thus establishing a 0.5 V margin in which induced voltages
can be tolerated. The voltage induced across the receiving coil is
given by
where:
β is the magnetic flux density (gauss).
r
N is the total number of turns in the receiving coil.
n
ISO
is the radius of the n
, a voltage-limiting device such as a Zener diode can be used to
V = (−dβ/dt)∑πr
ADuM5401/ADuM5402/ADuM5403/ADuM5404
devices exhibits V
ADuM5401/ADuM5402/ADuM5403/ADuM5404
n
2
th
; n = 1, 2, … , N
turn in the receiving coil (cm).
devices must operate at 180 MHz to
for board layout recommendations
ISO
overshoot during startup. If
is set by the condition in
is examined because it