ADUM5400ARWZ1 AD [Analog Devices], ADUM5400ARWZ1 Datasheet - Page 14

• Manufacturer Part Number: ADUM5400ARWZ1
• Description: Quad-Channel Isolator with Integrated DC-to-DC Converter
• Manufacturer: AD [Analog Devices]

ADuM5400
APPLICATIONS INFORMATION
THEORY OF OPERATION
The dc-to-dc converter section of the ADuM5400 works on
principles that are common to most modern power supplies. It
is a secondary side controller architecture with isolated pulse-
width modulation (PWM) feedback. V
oscillating circuit that switches current into a chip-scale air core
transformer. Power transferred to the secondary side is rectified
and regulated to either 3.3 V or
5 V. The secondary (V
creating a PWM control signal that is sent to the primary (V
side by a dedicated iCoupler data channel. The PWM modulates
the oscillator circuit to control the power being sent to the secon-
dary side. Feedback allows for significantly higher power and
efficiency.
The ADuM5400 implements under voltage lockout (UVLO) with
hysteresis on the V
converter does not go into oscillation due to noisy input power or
slow power on ramp rates.
A minimum load current of 10 mA is recommended to ensure
optimum load regulation. Smaller loads can generate excess noise
on chip due to short or erratic PWM pulses. Excess noise gener-
ated this way can cause data corruption, in some circumstances.
PC BOARD LAYOUT
The ADuM5400 digital isolator with 0.5 W isoPower integrated
dc-to-dc converters requires no external interface circuitry for
the logic interfaces. Power supply bypassing is required at the
input and output supply pins (Figure 17). Note that a low ESR
bypass capacitor is required between Pin 1 and Pin 2, as close to
the chip pads as possible.
The power supply section of the ADuM5400 uses a very high
oscillator frequency to efficiently pass power through its chip
scale transformers. In addition, normal operation of the data
section of the iCoupler introduces switching transients on the
power supply pins. Bypass capacitors are required for several
operating frequencies. Noise suppression requires a low
inductance, high frequency capacitor; ripple suppression and
proper regulation require a large value capacitor. These are most
conveniently connected between Pin 1 and Pin 2 for V
between Pin 15 and Pin 16 for V
ripple, a parallel combination of at least two capacitors is
required. The recommended capacitor values are 0.1 μF and 33
μF for V
example, use of a ceramic capacitor is advised.
Note that the total lead length between the ends of the low ESR
capacitor and the input power supply pin must not exceed 2 mm.
Installing the bypass capacitor with traces more than 2 mm in
length may result in data corruption. A bypass between Pin 1 and
Pin 8 and between Pin 9 and Pin 16 should also be considered
unless both common ground pins are connected together close
to the package.
DD1
. The smaller capacitor must have a low ESR; for
DD1
power input. This feature ensures that the
ISO
) side controller regulates the output by
ISO
. To suppress noise and reduce
DD1
power is supplied to an
DD1
and
Rev. PrA | Page 14 of 21
DD1
)
In applications involving high common-mode transients, care
should be taken to ensure that board coupling across the isolation
barrier is minimized. Furthermore, the board layout should be
designed such that any coupling that does occur equally affects
all pins on a given component side. Failure to ensure this could
cause voltage differentials between pins, exceeding the Absolute
Maximum Ratings specified in Table 8, thereby leading to latch-up
and/or permanent damage.
The ADuM5400 is a power device that dissipates about 1 W of
power when fully loaded and running at maximum speed. Because
it is not possible to apply a heat sink to an isolation device, the
devices primarily depend on heat dissipation into the PCB through
the GND pins. If the devices are used at high ambient
temperatures, care should be taken to provide a thermal path
from the GND pins to the PCB ground plane. The board layout in
Figure 17 shows enlarged pads for Pin 8 and Pin 9. Large
diameter vias should be implemented from the pad to the
ground, and power planes should be used to reduce inductance.
Multiple vias in the thermal pads can significantly reduce
temperatures inside the chip. The dimensions of the expanded
pads are left to the discretion of the designer and the available
board space.
THERMAL ANALYSIS
The ADuM5400 part consists of four internal die attached to a
split lead frame with two die attach paddles. For the purposes of
thermal analysis, the die are treated as a thermal unit, with the
highest junction temperature reflected in the θ
The value of θ
mounted on a JEDEC standard, four-layer board with fine width
traces and still air. Under normal operating conditions, the
ADuM5400 device operates at full load across the full temperature
range without derating the output current. However, following
the recommendations in the PC Board Layout section decreases
thermal resistance to the PCB, allowing increased thermal margins
in high ambient temperatures.
V
V
V
V
BYPASS < 2mm
IB
IC
IC
IA
GND
GND
V
/V
/V
/V
/V
DD1
OB
OC
OD
OA
1
1
Figure 17. Recommended Printed Circuit Board Layout
JA
is based on measurements taken with the parts
Preliminary Technical Data
JA
from Table 3.
V
GND
V
V
V
V
V
GND
ISO
OA
OB
OC
OD
SEL
/V
/V
/V
/V
ISO
ISO
IA
IB
IC
ID