XR20M1170IL16 EXAR [Exar Corporation], XR20M1170IL16 Datasheet - Page 26

• Manufacturer Part Number: XR20M1170IL16
• Description: I2C/SPI UART WITH 64-BYTE FIFO
• Manufacturer: EXAR [Exar Corporation]

0x0C IOIntEna RD/WR
0x0D reserved
0x0B
0x0E IOControl RD/WR
0x0F
A
0x02
0x06
XR20M1170
I2C/SPI UART WITH 64-BYTE FIFO
SEE”RECEIVER” ON PAGE 16.
SEE”TRANSMITTER” ON PAGE 14.
The Interrupt Enable Register (IER) masks the interrupts from receive data ready, transmit empty, line status
and modem status registers. These interrupts are reported in the Interrupt Status Register (ISR).
When the receive FIFO (FCR BIT-0 = 1) and receive interrupts (IER BIT-0 = 1) are enabled, the RHR interrupts
(see ISR bits 2 and 3) status will reflect the following:
0x00
0x01
0x02
0x04
0x05
0x07
4.0 INTERNAL REGISTER DESCRIPTIONS
4.1
4.2
4.3
4.3.1
DDR
IOState
XOFF1
XOFF2
T
EFCR
XON1
XON2
N
Receive Holding Register (RHR) - Read- Only
Transmit Holding Register (THR) - Write-Only
Interrupt Enable Register (IER) - Read/Write
DLM
DLD
EFR
R
DLL
ABLE
AME
EG
IER versus Receive FIFO Interrupt Mode Operation
8: INTERNAL REGISTERS DESCRIPTION.
RD/WR
RD/WR Fast IR
RD/WR
RD/WR
RD/WR
RD/WR
RD/WR
RD/WR
RD/WR
RD/WR
R
W
EAD
RITE
-
/
Enable
Mode
B
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Auto
CTS
Bit-7
Bit-7
Bit-7
Bit-7
IT
0
0
-7
Auto RTS
Enable
B
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
IT
0
0
0
-6
Baud Rate Generator Divisor
4X Mode 8X Mode
Special
RS485
Select
Invert
B
Enhanced Registers
Char
Bit-5
Bit-5
Auto
Bit-5
Bit-5
Bit-5
Bit-5
Bit-5
Bit-5
IT
0
0
-5
MCR[7:5],
FCR[5:4],
IER [7:4],
ISR [5:4],
Enable
RS485
Enable
26
B
Bit-4
Bit-4
Auto
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
DLD
IT
0
0
-4
S
HADED BITS ARE ENABLED WHEN
Divisor
UART
Reset
B
Frac-
tional
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Soft-
ware
Flow
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Cntl
SW
IT
0
0
-3
Disable
Divisor
tional
B
Frac-
Soft-
ware
Flow
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Cntl
TX
IT
0
0
-2
GPIO or
Modem
Disable
Divisor
Frac-
tional
B
Soft-
ware
Flow
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Cntl
RX
IO
IT
0
-1
IOLatch
Divisor
Mode
B
Frac-
tional
ware
Bit-0
Bit-0
9-Bit
Bit-0
Bit-0
Bit-0
Soft-
Flow
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
EFR B
Cntl
IT
0
-0
IT
-4=1
LCR ≠ 0xBF
LCR ≠ 0xBF
LCR=0
C
LCR[7]=1
LCR[7]=1
EFR[4]=1
REV. 1.0.0
OMMENT
X
BF