AK5394AVS AKM [Asahi Kasei Microsystems], AK5394AVS Datasheet - Page 13

• Manufacturer Part Number: AK5394AVS
• Description: Super High Performance 192kHz 24-Bit ADC
• Manufacturer: AKM [Asahi Kasei Microsystems]

ASAHI KASEI
The external clocks that are required to operate the AK5394A are MCLK, LRCK(fs) and SCLK. MCLK should be
synchronized with LRCK but the phase is free of care. Table 1 and 2 show the relationship between the sampling rate and
the frequencies of MCLK and SCLK.
As the AK5394A includes the phase detect circuit for LRCK, the AK5394A is reset automatically when the
synchronization is out of phase by changing the clock frequencies. Therefore, the reset is only needed for power-up.
All external clocks must be present unless RSTN pin = “L”, otherwise excessive current may result from abnormal
operation of internal dynamic logic.
The AK5394A supports four serial data formats that can be selected via SMODE1 and SMODE2 pins (Table 3). The data
format is MSB-first, 2’s complement.
MS0137-E-03
System Clock Input
Serial Data Interface
Figure
Figure 1
Figure 2
Figure 3
Figure 4
SCLK (Master Mode)
SCLK (Slave Mode)
Sampling Speed
LRCK (fs)
LRCK (fs)
44.1kHz
192kHz
SMODE2
MCLK
32kHz
48kHz
96kHz
H
H
Table 2. Examples of System Clock Frequency
L
L
DFS0
DFS1
OPERATION OVERVIEW
SMODE1
Table 3. Serial I/F Formats
Table 1. System Clocks
H
H
L
L
11.2896MHz
12.2880MHz
12.2880MHz
12.2880MHz
8.1920MHz
∼ 54kHz
Normal
∼ 128fs
MCLK
128fs
256fs
L
L
- 13 -
I
I
2
2
S Master Mode
Master Mode
S Slave Mode
Slave Mode
Mode
∼ 108kHz
Double
∼ 64fs
128fs
64fs
H
L
∼ 4.0960MHz
∼ 5.6448MHz
∼ 6.1440MHz
∼ 6.1440MHz
∼ 12.288MHz
SCLK
Lch = H, Rch = L
Lch = H, Rch = L
Lch = L, Rch = H
Lch = L, Rch = H
∼ 216kHz
∼ 64fs
Quad
64fs
64fs
L
H
LRCK
[AK5394A]
2005/05