X4045 INTERSIL [Intersil Corporation], X4045 Datasheet - Page 15

• Manufacturer Part Number: X4045
• Description: CPU Supervisor with 4kbit EEPROM
• Manufacturer: INTERSIL [Intersil Corporation]

Data Protection
The following circuitry has been included to prevent
inadvertent writes:
– The WEL bit must be set to allow write operations.
– The proper clock count and bit sequence is required
– A three step sequence is required before writing into
– The WP pin, when held HIGH, prevents all writes to
– Communication to the device is inhibited as a result
– Block lock bits can protect sections of the memory
prior to the stop bit in order to start a nonvolatile
write cycle.
the control register to change watchdog timer or
block lock settings.
the array and the control register.
of a low voltage condition (V
progress communication is terminated.
array from write operations.
15
CC
< V
TRIP
)any in-
X4043, X4045
Symbol Table
WAVEFORM
INPUTS
Must be
steady
May change
from LOW
to HIGH
May change
from HIGH
to LOW
Don’t Care:
Changes
Allowed
N/A
OUTPUTS
Will be
steady
Will change
from LOW
to HIGH
Will change
from HIGH
to LOW
Changing:
State Not
Known
Center Line
is High
Impedance
March 16, 2006
FN8118.2