NCV4276B ONSEMI [ON Semiconductor], NCV4276B Datasheet - Page 6

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NCV4276B

Manufacturer Part Number
NCV4276B
Description
400 mA Low-Drop Voltage Regulator
Manufacturer
ONSEMI [ON Semiconductor]
Datasheet

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Circuit Description
that provides a regulated voltage at 400 mA to the output.
It is enabled with an input to the inhibit pin. The regulator
voltage is provided by a PNP pass transistor controlled by
an error amplifier with a bandgap reference, which gives it
the lowest possible dropout voltage. The output current
capability is 400 mA, and the base drive quiescent current
is controlled to prevent oversaturation when the input
voltage is low or when the output is overloaded. The
regulator is protected by both current limit and thermal
shutdown. Thermal shutdown occurs above 150°C to
protect the IC during overloads and extreme ambient
temperatures.
Regulator
sample of the output voltage (V
PNP series pass transistor via a buffer. The reference is a
bandgap design to give it a temperature−stable output.
Saturation control of the PNP is a function of the load
current and input voltage. Oversaturation of the output
power device is prevented, and quiescent current in the
ground pin is minimized. See Figure 2, Test Circuit, for
circuit element nomenclature illustration.
Regulator Stability Considerations
stabilize the input impedance to avoid voltage line
influences. Using a resistor of approximately 1.0 W in
series with C
stray inductance and capacitance.
characteristics of a linear regulator: startup delay, load
transient response and loop stability. The capacitor value
and type should be based on cost, availability, size and
temperature
capacitor is the least expensive solution, but, if the circuit
operates at low temperatures (−25°C to −40°C), both the
value and ESR of the capacitor will vary considerably. The
capacitor manufacturer’s data sheet usually provides this
information.
should work for most applications; see also Figure 3 for
output stability at various load and Output Capacitor ESR
conditions. Stable region of ESR in Figure 3 shows ESR
values at which the LDO output voltage does not have any
permanent oscillations at any dynamic changes of output
load current. Marginal ESR is the value at which the output
voltage waving is fully damped during four periods after
the load change and no oscillation is further observable.
The NCV4276B is an integrated low dropout regulator
The error amplifier compares the reference voltage to a
The input capacitors (C
The output capacitor helps determine three main
The value for the output capacitor C
I2
constraints. The aluminum electrolytic
can stop potential oscillations caused by
I1
and C
Q
) and drives the base of a
I2
Q
) are necessary to
, shown in Figure 2,
http://onsemi.com
6
capacitors and additional series resistors to emulate ESR.
Low duty cycle pulse load current technique has been used
to maintain junction temperature close to ambient
temperature.
Calculating Bypass Capacitor
connect the bypass capacitor C
pin and Q pin according to Applications circuit at Figure 4.
feedback resistor R
function as an additional zero and affects the device loop
stability, therefore its value must be optimized. Attention
to the Output Capacitor value and its ESR must be paid. See
also Stability in High Speed Linear LDO Regulators
Application Note, AND8037/D for more information.
expression
where
transfer function by R
requirement. Chose the f
capacitance C
have been used as low ESR output capacitors C
table above to define the frequency ranges of additional
zero required for stability.
GRM31CR71C106KAC7 (10 mF, 16 V, X7R, 1206)
GRM32ER71C226KE18 (22 mF, 16 V, X7R, 1210)
GRM32ER61C476ME15 (47 mF, 16 V, X5R, 1210)
GRM32ER60J107ME20 (100 mF, 6.3 V, X5R, 1210)
Inhibit Input
holding the pin down to a voltage less than 1.8 V, the output
of the regulator will be turned off. When the voltage on the
Inhibit pin is greater than 2.8 V, the output of the regulator
will be enabled to power its output to the regulated output
voltage. The inhibit pin may be connected directly to the
input pin to give constant enable to the output regulator.
f
ESR characteristics were measured with ceramic
If usage of low ESR ceramic capacitors is demanded,
Parallel combination of bypass capacitor C
Optimal value of bypass capacitor is given by following
R
f
Set the R
z
Ceramic capacitors and its part numbers listed bellow
The inhibit pin is used to turn the regulator on or off. By
z
Range (kHz)
1
C
= the frequency of the zero added into the device
= the upper feedback resistor
Q
(mF)
1
Q
C b +
, refer to the table below.
resistor according to output voltage
20 - 50
1
10
2
1
contributes in the device transfer
and C
p
z
1
14 - 35
with regard on the output
b
f z
22
external components.
b
between Voltage Adjust
R 1
@ (F)
10 - 20
47
b
Q
with the
from the
7 – 14
100

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