SE97BTP NXP [NXP Semiconductors], SE97BTP Datasheet
SE97BTP
Available stocks
Related parts for SE97BTP
SE97BTP Summary of contents
Page 1
SE97B DDR memory module temp sensor with integrated SPD Rev. 01 — 27 January 2010 1. General description Meets JEDEC Specification 42.4 TSE2002B1, 3 Jun 2009. The NXP Semiconductors SE97B measures temperature from −40 °C to +125 °C with JEDEC ...
Page 2
NXP Semiconductors Table 1. Comparison of SE97 versus SE97B features Feature JEDEC specification Bit 8 ‘1’ Thermal Sensor shutdown Bit 8 ‘0’ Thermal Sensor active 2 I C-bus maximum frequency SCL and SDA V /V voltage levels ...
Page 3
... Ordering information Type number Topside Package mark Name [1] SE97BTP 97B HWSON8 Industry standard 2 mm × × 0.8 mm package to JEDEC WCE-3, PSON8 × pitch tape 4 k quantity reels. [1] SE97B_1 Product data sheet DDR memory module temp sensor with integrated SPD Description plastic thermal enhanced very very thin small outline package ...
Page 4
NXP Semiconductors 5. Block diagram SE97B TEMPERATURE REGISTER CRITICAL ALARM TRIP UPPER ALARM TRIP LOWER ALARM TRIP CAPABILITY MANUFACTURING ID DEVICE/REV ID SMBus TIMEOUT/ALERT CONFIGURATION • HYSTERESIS • SHUTDOWN TEMP SENSOR • LOCK PROTECTION • EVENT OUTPUT ON/OFF • EVENT ...
Page 5
... O Thermal alarm output for high/low and critical temperature limit (open-drain). Must have external pull-up resistor. 8 power device power supply (3 3.6 V) Rev. 01 — 27 January 2010 EVENT SE97BTP 6 SCL 5 SDA 002aae311 © NXP B.V. 2010. All rights reserved. SE97B ...
Page 6
NXP Semiconductors 7. Functional description 7.1 Serial bus interface The SE97B communicates with a host controller by means of the 2-wire serial bus 2 (I C-bus/SMBus) that consists of a serial clock (SCL) and serial data (SDA) signals. The device ...
Page 7
NXP Semiconductors 7.3 EVENT output condition The EVENT output indicates conditions such as the temperature crossing a predefined boundary. The EVENT modes are very configurable and selected using the configuration register (CONFIG). The interrupt mode or comparator mode is selected ...
Page 8
NXP Semiconductors temperature (°C) critical Upper Boundary Alarm Lower Boundary Alarm EVENT in Comparator mode EVENT in Interrupt mode software interrupt clear EVENT in ‘Critical Temp only’ mode Refer to Table 4 for figure note information. Fig 4. EVENT output ...
Page 9
NXP Semiconductors 7.3.2 EVENT thresholds 7.3.2.1 Alarm window The device provides a comparison window with an UPPER trip point and a LOWER trip point, programmed through the Upper Boundary Alarm Trip register (02h), and Lower Boundary Alarm Trip register (03h). ...
Page 10
NXP Semiconductors 7.3.3 EVENT operation modes 7.3.3.1 Comparator mode In comparator mode, the EVENT output behaves like a window-comparator output that asserts when the temperature is outside the window (e.g., above the value programmed in the Upper Boundary Alarm Trip ...
Page 11
NXP Semiconductors 7.4 Conversion rate The conversion time is the amount of time required for the ADC to complete a temperature measurement for the local temperature sensor. The conversion rate is the inverse of the conversion period which describes the ...
Page 12
NXP Semiconductors Table 5 registers. Table 5. Register 01h 02h 03h 04h 22h 7.7 SMBus TIMEOUT The SE97B supports SMBus TIMEOUT feature. If the host holds SCL LOW more than 35 ms, the SE97B would reset its internal state machine ...
Page 13
NXP Semiconductors START bit S 0 host detects SMBus ALERT Fig 5. How SE97B responds to SMBus Alert Response Address 7.9 SMBus/I The data registers in this device are selected by the Pointer Register. At power-up, the Pointer Register is ...
Page 14
NXP Semiconductors SCL SDA S START device address and write by host SCL D15 D14 D13 D12 SDA by host most significant byte data A = ACK = ...
Page 15
NXP Semiconductors SCL SDA S START device address and read by host SCL D15 D14 D13 D12 SDA returned most significant byte data A = ACK = Acknowledge ...
Page 16
NXP Semiconductors 7.10.1 Write operations 7.10.1.1 Byte Write In Byte Write mode the master creates a START condition and then broadcasts the slave address, byte address, and data to be written. The slave acknowledges all 3 bytes by pulling down ...
Page 17
NXP Semiconductors 7.10.1.3 Acknowledge polling Acknowledge polling can be used to determine if the SE97B is busy writing or is ready to accept commands. Polling is implemented by sending a ‘Selective Read’ command (described in acknowledge the slave address as ...
Page 18
NXP Semiconductors Up to eight memory devices can be connected on a single I 3-bit on the hardware selectable address (A2, A1, A0) inputs. The device only responds when the 4-bit fixed and hardware selectable bits are matched. The 8th ...
Page 19
NXP Semiconductors 7.10.2.2 Reversible Write Protection (RWP) and Clear Reversible Write Protection (CRWP) If the software write-protection has been set with the RWP instruction, it can be cleared again with a CRWP instruction. The two instructions, RWP and CRWP have ...
Page 20
NXP Semiconductors 7.10.3 Read operations 7.10.3.1 Current address read In Standby mode, the SE97B internal address counter points to the data byte immediately following the last byte accessed by a previous operation. If the ‘previous’ byte was the last byte ...
Page 21
NXP Semiconductors 7.10.3.3 Sequential read If the master acknowledges the first data byte transmitted by the SE97B, then the device will continue transmitting as long as each data byte is acknowledged by the master (Figure will ‘wrap around’ to the ...
Page 22
NXP Semiconductors 8. Register descriptions 8.1 Register overview This section describes all the registers used in the SE97B. The registers are used for latching the temperature reading, storing the low and high temperature limits, configuring, the hysteresis threshold of the ...
Page 23
NXP Semiconductors 8.2 CAP — Capability register (00h, 16-bit read-only) Table 10. CAP - Capability register (address 00h) bit allocation Bit 15 Symbol Default 0 Access R Bit 7 Symbol EVSD TMOUT Default 1 Access R Table 11. Bit 15:8 ...
Page 24
NXP Semiconductors 8.3 CONFIG — Configuration register (01h, 16-bit read/write) Table 12. CONFIG - Configuration register (address 01h) bit allocation Bit 15 Symbol Default 0 Access R Bit 7 Symbol CTLB AWLB Default 0 Access R/W R/W Table 13. Bit ...
Page 25
NXP Semiconductors Table 13. Bit SE97B_1 Product data sheet DDR memory module temp sensor with integrated SPD Configuration register (address 01h) bit description Symbol Description SHMD Shutdown Mode. 0 — Temperature Sensor is active and ...
Page 26
NXP Semiconductors Table 13. Bit SE97B_1 Product data sheet DDR memory module temp sensor with integrated SPD Configuration register (address 01h) bit description Symbol Description EOCTL EVENT Output Control. 0 — EVENT output disabled (default) 1 ...
Page 27
NXP Semiconductors Table 14. Hysteresis Enable Action Below Alarm Window bit (bit 13) Temperature Threshold slope temperature sets falling T trip(l) clears rising T trip(l) Above Alarm Window Below Alarm Window Fig 18. Hysteresis: how it works SE97B_1 Product data ...
Page 28
NXP Semiconductors 8.4 Temperature format The temperature data from the temperature read back register is an 11-bit 2’s complement word with the least significant bit (LSB) equal to 0.125 °C (resolution). A value of 019Ch will represent 25.75 °C • ...
Page 29
NXP Semiconductors 8.5 Temperature Trip Point registers While writing to the 16-bit Upper, Lower, or Critical Boundary Alarm Trip registers, please ensure that both bytes get written before doing a new START or STOP to ensure that a valid temperature ...
Page 30
NXP Semiconductors 8.5.2 LOWER — Lower Boundary Alarm Trip register (03h, 16-bit read/write) The value is the lower threshold temperature value for Alarm mode. The data format is 2’s complement with bit 2 = 0.25 °C. RFU bits will always ...
Page 31
NXP Semiconductors 8.6 TEMP — Temperature register (05h, 16-bit read-only) Table 22. Bit Symbol Default Access Bit Symbol Default Access Table 23. Bit 11:1 0 SE97B_1 Product data sheet DDR memory module temp sensor with integrated ...
Page 32
NXP Semiconductors 8.7 MANID — Manufacturer’s ID register (06h, 16-bit read-only) The SE97B Manufacturer’s ID register is intended to match NXP Semiconductors PCI SIG (1131h). Table 24. Bit Symbol Default Access Bit Symbol Default Access 8.8 DEVICEID — Device ID ...
Page 33
NXP Semiconductors 8.9 SMBUS — SMBus register (22h, 8-bit read/write) Table 26. Bit Symbol Default Access Bit Symbol Default Access Table 27. Bit 15 SE97B_1 Product data sheet DDR memory module temp sensor with ...
Page 34
NXP Semiconductors Table 27. Bit 1 0 [1] When the part comes out of shutdown, the state of the EVENT pin will not change until after the first temperature conversion. When the part enters shutdown, the ACT (TEMP[15]), AAW (TEMP[14]) ...
Page 35
NXP Semiconductors 9. Application design-in information In a typical application, the SE97B behaves as a slave device and interfaces to a bus master (or host) via the SCL and SDA lines. The EVENT output is monitored by the host, and ...
Page 36
NXP Semiconductors 9.1 SE97B in memory module application Figure 21 is centered in the memory module to monitor the temperature of the DRAM and also to provide a 2-kbit EEPROM as the Serial Presence Detect (SPD). In the event of ...
Page 37
NXP Semiconductors V OL(SDA) V OL(EVENT) I OL(sink)(SDA) I OL(sink)EVENT Calculation example: T amb I DD(AV 3 Maximum V I OL(sink)(SDA) V OL(EVENT) I OL(sink)EVENT R th(j-a) Self heating due to power dissipation is: ΔT = ...
Page 38
NXP Semiconductors 10. Limiting values Table 29. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol sink T j(max) T stg 11. Characteristics Table 30. Thermal sensor characteristics − ...
Page 39
NXP Semiconductors Table 31. DC characteristics − 3 3 amb Symbol Parameter V supply voltage DD I average supply current DD(AV) I supply current DD I supply voltage shutdown sd(VDD) mode ...
Page 40
NXP Semiconductors 320 I DD(AV) (μ 3 3.0 V 220 120 20 − C-bus inactive. Fig 22. Average supply current 5 I sd(VDD) (μ −1 − Fig ...
Page 41
NXP Semiconductors 0. (V) 0. 0.08 3.0 V 0.04 0 − Fig 28. EVENT output 0. (V) 0. ...
Page 42
NXP Semiconductors 3 (V) 2.5 2.0 1.5 1.0 − For temp sensor conversion. Fig 34. Average power-on threshold voltage 3 (V) 2.5 2.0 1.5 1.0 − For EEPROM write operation. Fig 36. ...
Page 43
NXP Semiconductors 3.0 T lim(acc) (°C) 1.5 0 −1.5 −3.0 − Fig 38. SE97B temperature accuracy SE97B_1 Product data sheet DDR memory module temp sensor with integrated SPD 002aaf189 120 thermal response (%) 120 ...
Page 44
NXP Semiconductors Table 32. SMBus AC characteristics − 3 3 amb The AC specifications fully meet or exceed SMBus 2.0 specifications, but allow the bus to interface with the I to ...
Page 45
NXP Semiconductors [9] The write cycle time is the time elapsed between the STOP command (following the write instruction) and the completion of the internal write cycle. During the internal write cycle, SDA is released by the slave and the ...
Page 46
NXP Semiconductors 12. Package outline HWSON8: plastic thermal enhanced very very thin small outline package; no leads; 8 terminals; body 0 terminal 1 index area terminal 1 index area ...
Page 47
NXP Semiconductors 13. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 13.1 Introduction to ...
Page 48
NXP Semiconductors 13.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including ...
Page 49
NXP Semiconductors Fig 42. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 14. Abbreviations Table 35. Acronym ADC ARA CDM CPU DDR DIMM DRAM EEPROM ...
Page 50
NXP Semiconductors Table 35. Acronym SMBus SO-DIMM SPD 15. Revision history Table 36. Revision history Document ID Release date SE97B_1 20100127 SE97B_1 Product data sheet DDR memory module temp sensor with integrated SPD Abbreviations …continued Description System Management Bus Small ...
Page 51
NXP Semiconductors 16. Legal information 16.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...
Page 52
NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...
Page 53
NXP Semiconductors 17 Contact information Contents . . . . . . . . . . . . ...