HIP4082_06 INTERSIL [Intersil Corporation], HIP4082_06 Datasheet - Page 6

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HIP4082_06

Manufacturer Part Number
HIP4082_06
Description
80V, 1.25A Peak Current H-Bridge FET Driver
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
Pin Descriptions
NUMBER
PIN
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
SYMBOL
BHB
AHB
AHO
AHS
BHS
BHO
DEL
ALO
BLO
V
BHI
V
AHI
DIS
BLI
ALI
DD
SS
B High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap
diode and positive side of bootstrap capacitor to this pin.
B High-side Input. Logic level input that controls BHO driver (Pin 16). BLI (Pin 3) high level input overrides BHI high
level input to prevent half-bridge shoot-through, see Truth Table. DIS (Pin 8) high level input overrides BHI high level
input. The pin can be driven by signal levels of 0V to 15V (no greater than V
B Low-side Input. Logic level input that controls BLO driver (Pin 14). If BHI (Pin 2) is driven high or not connected
externally then BLI controls both BLO and BHO drivers, with dead time set by delay currents at DEL (Pin 5). DIS (Pin
8) high level input overrides BLI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than
V
A Low-side Input. Logic level input that controls ALO driver (Pin 13). If AHI (Pin 7) is driven high or not connected
externally then ALI controls both ALO and AHO drivers, with dead time set by delay currents at DEL (Pin 5). DIS (Pin
8) high level input overrides ALI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than
V
Turn-on DELay. Connect resistor from this pin to V
All drivers turn-off with no adjustable delay, so the DEL resistor guarantees no shoot-through by delaying the turn-on
of all drivers. The voltage across the DEL resistor is approximately Vdd -2V.
Chip negative supply, generally will be ground.
A High-side Input. Logic level input that controls AHO driver (Pin 10). ALI (Pin 4) high level input overrides AHI high
level input to prevent half-bridge shoot-through, see Truth Table. DIS (Pin 8) high level input overrides AHI high level
input. The pin can be driven by signal levels of 0V to 15V (no greater than V
DISable input. Logic level input that when taken high sets all four outputs low. DIS high overrides all other inputs. When
DIS is taken low the outputs are controlled by the other inputs. The pin can be driven by signal levels of 0V to 15V (no
greater than V
A High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap
diode and positive side of bootstrap capacitor to this pin.
A High-side Output. Connect to gate of A High-side power MOSFET.
A High-side Source connection. Connect to source of A High-side power MOSFET. Connect negative side of bootstrap
capacitor to this pin.
Positive supply to control logic and lower gate drivers. De-couple this pin to V
A Low-side Output. Connect to gate of A Low-side power MOSFET.
B Low-side Output. Connect to gate of B Low-side power MOSFET.
B High-side Source connection. Connect to source of B High-side power MOSFET. Connect negative side of bootstrap
capacitor to this pin.
B High-side Output. Connect to gate of B High-side power MOSFET.
DD
DD
).
).
6
DD
).
HIP4082
HIP4082
SS
DESCRIPTION
to set timing current that defines the dead time between drivers.
DD
DD
SS
).
).
(Pin 6).
January 3, 2006
FN3676.4

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