A4402 ALLEGRO [Allegro MicroSystems], A4402 Datasheet - Page 12

• Manufacturer Part Number: A4402
• Description: Constant On-Time Buck Converter with Integrated Linear Regulator
• Manufacturer: ALLEGRO [Allegro MicroSystems]

A4402
Worst-case ripple current occurs at maximum supply voltage.
After calculating the duty cycle, DC, for this condition, the ripple
current can be calculated. First to calculate DC:
Using the duty cycle, a ripple current can be calculated using the
following formula:
where I
is the minimum switching frequency (nominal frequency minus
25%). For the example used above, a 1 A converter with a supply
voltage of 13.5 V was the design objective. The supply voltage
can vary by ±10%. The output voltage is 5 V, V
is 0.15, and the desired frequency is 2.0 MHz. The duty cycle
is calculated to be 36.45%. The worst-case frequency is 2 MHz
minus 20% or 1.6 MHz. Using these numbers in the above
formula shows that the minimum inductance for this converter is
9.6 μH.
Output Capacitor The converter is designed to operate with
a low-value ceramic output capacitor. When choosing a ceramic
capacitor, make sure the rated voltage is at least 3 times the
maximum output voltage of the converter. This is because the
capacitance of a ceramic decreases as they operate closer to their
rated voltage. It is recommended that the output be decoupled
with a 10 μF, X7R ceramic capacitor. Larger capacitance may be
required on the outputs if load surges dramatically influence the
output voltage.
Output ripple is determined by the output capacitance and the
effects of ESR and ESL can be ignored assuming recommended
layout techniques are followed. The output voltage ripple is
approximated by:
Input Capacitor The value of the input capacitance affects
the amount of current ripple on the input. This current ripple is
usually the source of supply side EMI. The amount of interfer-
ence depends on the impedance from the input capacitor and
the bulk capacitance located on the supply bus. Adding a small
value, 0.1 μF , ceramic capacitor as close to the input supply pin
as possible can reduce EMI effects. The small capacitor will help
reduce high frequency transient currents on the supply line. If
RIPPLE
DC =
V
L
RIPPLE
=
V
is 25% of the maximum load current, and f
V
IN1
IN1
V
I
RIPPLE
=
SW
– V
(max) + V
4 × f
+ V
SW
I
RIPPLE
f
SW
+ (V
×
× C
f
+ (V
DC
SENSE
OUT
×
SENSE
× I
f
PEAK
.
SW
× I
1
(min)
PEAK
)
f
is 0.5 V, V
)
.
,
SW
SENSE
(min)
(12)
(13)
(14)
Constant On-Time Buck Converter
further filtering is needed it, is recommended that two ceramic
capacitors be used in parallel to further reduce emissions.
Rectification Diode The diode conducts the current during the
off-cycle. A Schottky diode is needed to minimize the forward
drop and switching losses. In order to size the diode correctly, it
is necessary to find the average diode conduction current using
the formula below:
where DC (min) is defined as:
where V
forward voltage of the diode.
Average power dissipation in the diode is:
The power dissipation in the sense resistor must also be consid-
ered using I
PCB Layout The board layout has a large impact on the per-
formance of the device. It is important to isolate high current
ground returns, to minimize ground bounce that could produce
reference errors in the device. The method used to isolate power
ground from noise sensitive circuitry is to use a star ground. This
approach makes sure the high current components such as the
input capacitor, output capacitor, and diode have very low imped-
ance paths to each other. Figure 2 illustrates the technique.
Figure 2. Star Ground Connection
with Integrated Linear Regulator
IN1
I
P
DC (min) =
D(av)
Current path (off-cycle )
Current path (on-cycle )
D(diode)
C
2
is the maximum input voltage and V
IN
R and the minimum duty cycle.
=
I
LOAD
=
I
LOAD(av)
Q1
R
× (1 – DC(min))
V
V
SENSE
SW
IN1
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Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
+V
+V
× DC(min) × V
f
f
D
,
Star Ground
L
,
C
f
OUT
f
is the maximum
,
R
LOAD
(15)
(16)
(17)
12