NCP1392B_09 ONSEMI [ON Semiconductor], NCP1392B_09 Datasheet - Page 12

• Manufacturer Part Number: NCP1392B_09
• Description: High-Voltage Half-Bridge Driver with Inbuiltc Oscillator
• Manufacturer: ONSEMI [ON Semiconductor]

bridge applications and especially resonant half bridge
applications. The IC includes several features that help the
designer to cope with resonant SPMS design. All features
are described thereafter:
•
•
•
•
which is proportional to the current flowing out from the
Rt pin. The discharging current I
on this capacitor reaches 2.5 V. The output drivers are
disabled during discharge period so the dead time length is
The NCP1392 is primarily intended to drive low cost half
The internal timing capacitor Ct is charged by current
Wide Operating Frequency Range: The internal
current controlled oscillator is capable to operate over
wide frequency range. Minimum frequency accuracy is
$3%.
Fixed Dead−Time: The internal dead−time helping to
fight with cross conduction between the upper and
lower power transistors. Three versions with different
dead time values are available to cover wide range of
applications.
PFC Timer: Fixed delay is placed to IC operation
whenever the driver restarts (VCC
events). This delay assures that the bulk voltage will be
stabilized in the time the driver provides pulses on the
outputs. Another benefit of this delay is that the soft
start capacitor will be full discharged before any restart.
Brown−Out Detection: The BO input monitors bulk
voltage level via resistor divider and thus assures that
the application is working only for wanted bulk voltage
band. The BO input sinks current of 18.2 mA until the
Vref
the bulk voltage hysteresis according to the application
needs.
C
R
soft−start
soft−start
BO
R
t
threshold is reached. Designer can thus adjust
R
t
Figure 28. The Internal Current Controlled Oscillator Architecture
Delay
+
−
DT
is applied when voltage
ON
+
−
or BO_OK detect
V
ref
From PFC Delay
APPLICATION INFORMATION
Rt
V
DD
http://onsemi.com
C
t
12
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Current Controlled Oscillator
circuitry allowing operation from 50 kHz up to 960 kHz.
However, as a division by two internally creates the two Q
and Q outputs, the final effective signal on output Mlower
and Mupper switches in half frequency range. The VCO is
configured in such a way that if the current that flows out
from the Rt pin increases, the switching frequency also goes
up. Figure 28 shows the architecture of this oscillator.
given by the discharge current sink capability. Discharge
sink is disabled when voltage on the timing capacitor
reaches zero and charging cycle starts again. The charging
current and thus also whole oscillator is disabled during the
PFC delay period to keep the IC consumption below 400 mA.
I
The current controlled oscillator features a high−speed
Non−Latched Enable Input: The enable comparator
input is connected in parallel to the BO terminal to
allow the designer stop the output drivers when needed.
There is no PFC delay when enable input is released so
skip mode for resonant SMPS applications and
dimming for light ballast applications are possible.
Internal V
a way to prepare passive voltage regulator to maintain
V
from unregulated power supply or from bulk capacitor.
Low Startup Current: This device features maximum
startup current of 50 mA which allows the designer to
use high value startup resistor for applications when
driver is supplied from the auxiliary winding. Power
dissipation of startup resistor is thus significantly
reduced.
DT
CC
voltage at 16 V in case the controller is supplied
CC
+
−
V
Clamp: The internal zener clamp offers
ref
+
−
Reset
PON
From EN
Cmp.
S
D
R
CLK
Q
Q
A
B
Dead
Time