FAN6754_09 FAIRCHILD [Fairchild Semiconductor], FAN6754_09 Datasheet - Page 3

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FAN6754_09

Manufacturer Part Number
FAN6754_09
Description
Highly Integrated Green- Mode PWM Controller
Manufacturer
FAIRCHILD [Fairchild Semiconductor]
Datasheet
© 2009 Fairchild Semiconductor Corporation
FAN6754 • Rev. 1.0.1
Marking Information
Pin Configuration
Pin Definitions
Pin #
1
2
3
4
5
6
7
8
ZXYTT
6754MR
TPM
SENSE
Name
GATE
GND
VDD
NC
FB
HV
RT
Description
Ground. This pin is used for the ground potential of all the pins. A 0.1µF decoupling capacitor
placed between VDD and GND is recommended.
Feedback. The output voltage feedback information from the external compensation circuit is
fed into this pin. The PWM duty cycle is determined by this pin and the current-sense signal
from Pin 6. FAN6754 performs an open-loop protection (OLP); if the FB voltage is higher than a
threshold voltage (around 4.6V) for more than 55ms, the controller latches off the PWM.
No Connection.
High Voltage Startup. This pin is connected to the line input via a 1N4007 and 200k0 resistors
to achieve brownout and high/low line compensation. Once the voltage on the HV pin is lower
than the brownout voltage, PWM output turns off. High/low line compensation dominates the
cycle-by-cycle current limiting to achieve constant output power limiting with universal input.
Over-Temperature Protection. An external NTC thermistor is connected from this pin to GND.
The impedance of the NTC decreases at high temperatures. Once the voltage on the RT pin
drops below the threshold voltage, the controller latches off the PWM.
Current Sense. This pin is used to sense the MOSFET current for the current-mode PWM and
current limiting.
Supply Voltage. IC operating current and MOSFET driving current are supplied using this pin.
This pin is connected to an external bulk capacitor of typically 47µF. The threshold voltage for
turn-on and turn-off is 16.5V and 9V, respectively. The operating current is lower than 2mA.
Gate Drive Output. The totem-pole output driver for the power MOSFET. It is internally clamped
below 13V.
Figure 4. Pin Configuration (Top View)
GND
NC
HV
FB
ZXYTT
6754ML
TPM
Figure 3. Top Mark
1
2
3
4
SOP-8
3
8
7
6
5
SENSE
GATE
VDD
RT
F - Fairchild Logo
Z - Plant Code
X - 1-Digit Year Code
Y - 1-Digit Week Code
TT - 2-Digit Die Run Code
T - Package Type (M=SOP)
P - Y: Package (Green)
M - Manufacture Flow Code
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