AT49F040-15JC ATMEL [ATMEL Corporation], AT49F040-15JC Datasheet - Page 3

• Manufacturer Part Number: AT49F040-15JC
• Description: 4 Megabit 512K x 8 5-volt Only CMOS Flash Memory
• Manufacturer: ATMEL [ATMEL Corporation]

Device Operation (Continued)
PRODUCT IDENTIFICATION: The product identification
mode identifies the device and manufacturer as Atmel. It
may be accessed by hardware or software operation. The
hardware operation mode can be used by an external pro-
grammer to identify the correct programming algorithm for
the Atmel product.
For details, see Operating Modes (for hardware operation)
or Software Product Identification. The manufacturer and
device code is the same for both modes.
DATA POLLING: The AT49F040 features DATA polling
to indicate the end of a program cycle. During a program
cycle an attempted read of the last byte loaded will result
in the complement of the loaded data on I/O7. Once the
program cycle has been completed, true data is valid on
all outputs and the next cycle may begin. DATA polling
may begin at any time during the program cycle.
Command Definition (in Hex)
Note:
Absolute Maximum Ratings*
Command
Sequence
Read
Chip Erase
Byte
Program
Boot Block
Lockout
Product ID
Entry
Product ID
Exit
Product ID
Exit
Temperature Under Bias................. -55 C to +125 C
Storage Temperature...................... -65 C to +150 C
All Input Voltages
(including NC Pins)
with Respect to Ground ................... -0.6V to +6.25V
All Output Voltages
with Respect to Ground .............-0.6V to V
Voltage on OE
with Respect to Ground .................. -0.6V to + 13.5V
(2)
(2)
1. The 16K byte boot sector has the address range 00000H to 03FFFH.
2. Either one of the Product ID exit commands can be used.
(1)
Cycles
Bus
1
6
4
6
3
3
1
XXXX
5555
5555
5555
5555
5555
Addr
Addr
1st Bus
Cycle
D
Data
AA
AA
AA
AA
AA
F0
OUT
2AAA
2AAA
2AAA
2AAA
2AAA
Addr
2nd Bus
Cycle
CC
Data
+ 0.6V
55
55
55
55
55
Addr
5555
5555
5555
5555
5555
3rd Bus
Cycle
TOGGLE BIT: In addition to DATA polling the AT49F040
provides another method for determining the end of a pro-
gram or erase cycle. During a program or erase operation,
successive attempts to read data from the device will re-
sult in I/O6 toggling between one and zero. Once the pro-
gram cycle has completed, I/O6 will stop toggling and valid
data will be read. Examining the toggle bit may begin at
any time during a program cycle.
HARDWARE DATA PROTECTION: Hardware features
protect against inadvertent programs to the AT49F040 in
the following ways: (a) V
(typical), the program function is inhibited. (b) Program in-
hibit: holding any one of OE low, CE high or WE high in-
hibits program cycles. (c) Noise filter: pulses of less than
15 ns (typical) on the WE or CE inputs will not initiate a
program cycle.
*NOTICE: Stresses beyond those listed under “Absolute Maxi-
Data
80
A0
80
90
F0
mum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions beyond those indi-
cated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
5555
5555
Addr
Addr
4th Bus
Cycle
Data
D
AA
AA
IN
AT49F040
CC
2AAA
2AAA
Addr
5th Bus
sense: if V
Cycle
Data
55
55
CC
5555
5555
Addr
is below 3.8V
6th Bus
Cycle
Data
4-211
10
40